FDC37B782-NS Standard Microsystems (SMSC), FDC37B782-NS Datasheet - Page 192

• Manufacturer Part Number: FDC37B782-NS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37B782-NS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Soft Power Status
Register 1
Default = 0x00
on Vbat POR
NAME
REG INDEX
0xB2 R/W
The following bits are the status for the wake-up
function of the nPowerOn bit. These indicate which
of the enabled wakeup functions caused the power
up.
1 = Occured
0 = Did not occur since last cleared
The following signals are latched to detect and hold
the soft power event (Type 1) (Note 1)
Bit[0] RI1: UART 1 Ring Indicator; high to low
transition on the pin, cleared by a read of this
register
Bit[1] RI2: UART 2 Ring Indicator; high to low
transition on the pin, cleared by a read of this
register
Bit[2] KCLK: Keyboard clock; high to low transition
on the pin, cleared by a read of this register
Bit[3] MCLK: Mouse clock; high to low transition on
the pin, cleared by a read of this register
Bit[6] IRRX2: IRRX2 input; high to low transition on
the pin, cleared by a read of this register
Bit[7] RTC ALARM: RTC Alarm; status of the RTC
Alarm internal signal. Cleared by a read of the
status register.
The following signals are not latched to detect and
hold the soft power event (Type 2) (Note 1)
Bit[4] GPINT1: Group Interrupt 1; status of the
GPINT1 internal signal. Cleared at the source
Bit[5] GPINT2: Group Interrupt 2; status of the
GPINT2 internal signal. Cleared at the source
195
DEFINITION
STATE
C