LPC47M112-MW Standard Microsystems (SMSC), LPC47M112-MW Datasheet - Page 191

• Manufacturer Part Number: LPC47M112-MW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M112-MW

• Lead Free Status / RoHS Status: Compliant

Enhanced Super I/O Controller with LPC Interface
Datasheet
Note 1: Maximum value only applies if there is room in the FIFO and terminal count has not been received. ECP can
Note 2: nACK is not considered asserted or deasserted until it is stable for a minimum of 75 to 130 ns.
SMSC DS – LPC47M112
NAME
stall by keeping nALF low.
t1
t2
t3
t4
t5
t6
PD<7:0>
nACK
nALF
PDATA Valid to nACK Asserted
nALF Asserted to PDATA Changed
nACK Asserted to nALF Deasserted
(Notes 1,2)
nACK Deasserted to nALF Asserted (Note 2)
nALF Asserted to nACK Asserted
nALF Deasserted to nACK Deasserted
FIGURE 24 - ECP PARALLEL PORT REVERSE TIMING
DESCRIPTION
t4
DATASHEET
t1
t5
Page 191
t3
t6
t4
MIN
80
80
0
0
0
0
t2
TYP
MAX
200
200
UNITS
ns
ns
ns
ns
ns
ns
Rev. 02-16-07