LPC47M112-MW Standard Microsystems (SMSC), LPC47M112-MW Datasheet - Page 65

• Manufacturer Part Number: LPC47M112-MW
• Manufacturer: Standard Microsystems (SMSC)

Specifications of LPC47M112-MW

• Lead Free Status / RoHS Status: Compliant

Enhanced Super I/O Controller with LPC Interface
Datasheet
LINE CONTROL REGISTER (LCR)
Address Offset = 3H, DLAB = 0, READ/WRITE
SMSC DS – LPC47M112
MODE
ONLY
BIT 3
FIFO
1
0
0
Start LSB Data 5-8 bits MSB Parity Stop
BIT 2
IDENTIFICATION
1
0
0
INTERRUPT
REGISTER
BIT 1
0
1
0
BIT 0
0
0
0
PRIORITY
Second
Third
Fourth
LEVEL
DATASHEET
INTERRUPT SET AND RESET FUNCTIONS
Character
Timeout
Indication
Transmitter
Holding
Register Empty
MODEM
Status
INTERRUPT
Page 65
TYPE
No Characters
Have Been
Removed From or
Input to the RCVR
FIFO during the
last 4 Char times
and there is at
least 1 char in it
during this time
Transmitter
Holding Register
Empty
Clear to Send or
Data Set Ready or
Ring Indicator or
Data Carrier
Detect
INTERRUPT
SOURCE
drops below the
trigger level.
Reading the
Receiver Buffer
Register
Reading the IIR
Register (if Source
of Interrupt) or
Writing the
Transmitter
Holding Register
Reading the
MODEM Status
Register
INTERRUPT
CONTROL
RESET
Rev. 02-16-07