FDC37C665GT Standard Microsystems (SMSC), FDC37C665GT Datasheet - Page 15

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FDC37C665GT

Manufacturer Part Number
FDC37C665GT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C665GT

Lead Free Status / RoHS Status
Not Compliant

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PIN NO.
71-68
66-63
100
60
59
75
23
Paper End
Printer Selected
Status
nError
Port Data
IOCHRDY
nIDE Low Byte
Enable
NAME
DESCRIPTION OF PIN FUNCTIONS
PE
SLCT
nERR
PD0-PD7
IOCHRDY
nIDEENLO
S1CF1
SYMBOL
BUFFER
OD24P
I/OP24
TYPE
O8
IDE
I
I
I
I
15
Another status output from the printer, a
high indicating that the printer is out of
paper. Bit 5 of the Printer Status Register
reads the PE input. Refer to Parallel Port
description for use of this pin in ECP and
EPP mode.
This high active output from the printer
indicates that it has power on. Bit 4 of the
Printer Status Register reads the SLCT
input. Refer to Parallel Port description for
use of this pin in ECP and EPP mode.
A low on this input from the printer indicates
that there is a error condition at the printer.
Bit 3 of the Printer Status register reads the
nERR input.
description for use of this pin in ECP and
EPP mode.
The bi-directional parallel data bus is used
to transfer information between CPU and
peripherals.
In EPP mode, this pin
extend the read/write command. This pin
has an internal pull-up.
This active low signal is used in both the XT
and AT mode. In the AT mode, this pin is
active when the IDE is enabled and the I/O
address is accessing 1F0H-1F7H and
3F6H-3F7H in primary address mode or
170H-177H and 376H,377H in secondary
address mode. In the XT mode, this signal
is active for accessing 320H-323H, 8 bit
programmed I/O or DMA.
FDC37C666GT (Adapter Mode): Primary
Serial Configuration 1.
during reset active to select the address of
the Secondary Serial Port.
DESCRIPTION
Refer to Parallel Port
Read and latched
is pulled low to

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