CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 18

• Manufacturer Part Number: CY7C66013-PVC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C66013-PVC

• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Not Compliant

be in an indeterminate state. Therefore, if an unused port bit is programmed in open-drain mode, it must be written with a ‘0.’
Notice that the CY7C66011/12/13 will always require that P3[7:5] be written with a ‘0.’ When the CY7C66111/12/13 is used the
P3[7] should be written with a ‘0.’
During reset, all of the GPIO pins are set to input (‘1’ in open drain) state. Writing a ‘0’ to a GPIO pin enables the output current
sink to ground (LOW). In this state, a ‘0’ will always be read on that GPIO pin unless an external source overdrives the output
current sink.
8.1
Every GPIO port can be programmed as inputs with internal pull-ups, open drain outputs, and traditional CMOS outputs. In
addition, the interrupt polarity for each port can be programmed. With positive interrupt polarity, a rising edge (‘0’ to ‘1’) on an
input pin causes an interrupt. With negative polarity, a falling edge (‘1’ to ‘0’) on an input pin causes an interrupt. As shown in the
table below, when a GPIO port is configured with CMOS outputs, interrupts from that port are disabled. The GPIO Configuration
Port register provides two bits per port to program these features. The possible port configurations are detailed in Table 8-1 .
Table 8-1. Port Configurations
In “Resistive” mode, a 14-k
pin that has been written as a ‘1.’ The resistor is disabled on any pin that has been written as a ‘0.’ An I/O pin will be driven HIGH
through a 14-k pull-up resistor when a ‘1’ has been written to the pin. The output pin will be driven LOW with the pull-up disabled
when a ‘0’ has been written to the pin. An I/O pin that has been written as a ‘1’ can be used as an input pin with an integrated
14-k
enabled.
In “CMOS” mode, all pins of the GPIO port are outputs that are actively driven. The current source and sink capacity are roughly
the same (symmetric output drive). A CMOS port is not a possible source for interrupts.
In “Open Drain” mode the internal pull-up resistor and CMOS driver (HIGH) are both disabled. An I/O pin that has been written
as a ‘1’ can be used as either an input or an open drain output. An I/O pin that has been written as a ‘0’ will drive the output LOW.
The interrupt polarity for an open drain GPIO port can be selected as either positive (rising edge) or negative (falling edge).
During reset, all of the bits in the GPIO Configuration Register are written with ‘0’ to select Open Drain output, positive interrupt
polarity for all GPIO ports as the default configuration.
8.2
When HAPI (HAPI is discussed in Section 13.0) is enabled the GPIO interrupts are blocked, including ports not used by HAPI,
and cannot interrupt the microcontroller.
During a reset, GPIO interrupts are disabled by clearing all of the GPIO interrupt enable ports. Writing a ‘1’ to a GPIO Interrupt
Enable bit enables GPIO interrupts from the corresponding input pin.
Config Bit 1
Port Configuration bits
Port 3
P0[7]
pull-up resistor. Resistive mode selects a negative (falling edge) interrupt polarity on all pins that have the GPIO interrupt
7
GPIO Configuration Port
GPIO Interrupt Enable Ports
11
11
10
10
01
01
00
00
Config Bit 0
Port 3
P0[6]
6
pull-up resistor is conditionally enabled for all pins of a GPIO port. The resistor is enabled for any
Figure 8-6. GPIO Configuration Register 0x08 (read/write)
Config Bit 1
Figure 8-7. Port 0 Interrupt Enable 0x04 (read/write)
Port 2
P0[5]
5
Pin Interrupt Bit
PRELIMINARY
0
1
0
1
0
1
0
1
Config Bit 0
Port 2
P0[4]
4
18
Config Bit 1
Port 1
P0[3]
3
CMOS Output
Driver Mode
Open Drain
Open Drain
Open Drain
Open Drain
Open Drain
Resistive
Resistive
Config Bit 0
Port 1
P0[2]
2
Disabled (Default Condition)
Config Bit 1
CY7C66011/12/13
CY7C66111/12/13
Port 0
P0[1]
Interrupt Polarity
1
Disabled
Disabled
Disabled
Disabled
–
–
+
Config Bit 0
Port 0
P0[0]
0