CY7C66013-PVC Cypress Semiconductor Corp, CY7C66013-PVC Datasheet - Page 30

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CY7C66013-PVC

Manufacturer Part Number
CY7C66013-PVC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C66013-PVC

Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Not Compliant

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The following table shows how the control bits are encoded for this register.
Table 17-2. Control Bit Definition for Upstream Port
18.0
The compound device (Device Address A) includes three endpoints: EPA0, EPA1, and EPA2. End Point 0 (EPA0) allows the USB
host to recognize, set up, and control the device. In particular, EPA0 is used to receive and transmit control (including set-up)
packets.
18.1
The USB Controller provides two USB Device Address Registers (A and B). Upon reset and under default conditions, Device A
has three endpoints while Device B has two endpoints. The USB Device Address Register contents are cleared during a reset,
setting the USB device addresses to zero and marking these addresses as disabled. Figure 18-1 shows the format of the USB
Address Register.
Bit 7 (Device Address Enable) in the USB Device Address Register must be set by firmware before the serial interface engine
(SIE) will respond to USB traffic to these addresses. The Device Address in bits [6:0] are set during the USB enumeration process
to a non-zero address assigned by the USB host.
18.2
The CY7C66xxx controller supports up to two addresses and five endpoints for communication with the host. The configuration
of these endpoints, and associated FIFOs, is controlled by bits [7,6] of the of the USB Status and Control Register (0x1F) Bit 7
controls the size of the endpoints and bit 6 controls the number of addresses. These configuration options are detailed in Table
18-1 .
Table 18-1. Memory Allocation for Endpoints
All USB devices are required to have a control endpoint 0 (EPA0 and EPB0) that is used to initialize and control each USB address.
Endpoint 0 provides access to the device configuration information and allows generic USB status and control accesses. Endpoint
0 is bidirectional as the USB controller can both receive and transmit data.
The endpoint mode registers are cleared during reset. The EPA0 and EPB0 endpoint mode registers use the format shown in
Figure 18-2 .
I/O status
Control Bits
Address
[7,6]
Enable
Device
000
001
010
011
100
101
110
111
USB Device Addresses
USB Device Endpoints
USB Compound Device
Label
EPB1
EPB0
EPA2
EPA1
EPA0
Address
Device
Bit 6
Force SE0; D+[0] LOW, D–[0] LOW
Not Forcing (SIE Controls Driver)
Address
Force D+[0] HIGH, D–[0] LOW
Force D+[0] LOW, D–[0] HIGH
Force D+[0] LOW, D–[0] LOW
0xD8
0xE0
0xE8
0xF0
0xF8
[0,0]
Force D+[0] HiZ, D–[0] LOW
Force D+[0] LOW, D–[0] HiZ
Force D+[0] HiZ, D–[0] HiZ
Figure 18-1. USB Device Address Registers 0x10, 0x40 (read/write)
Control Action
Address
Size
Device
8
8
8
8
8
Bit 5
PRELIMINARY
Label
EPB0
EPB1
EPA0
EPA1
EPA2
Address
Address
Device
Bit 4
0xA8
0xB0
0xB8
0xC0
0xE0
[1,0]
30
Size
32
32
8
8
8
Address
Device
Bit 3
Label
EPA4
EPA3
EPA2
EPA1
EPA0
Address
0xD8
0xE8
0xE0
0xF0
0xF8
[0,1]
Address
Device
Bit 2
Size
8
8
8
8
8
CY7C66011/12/13
CY7C66111/12/13
Address
Device
Label
EPA4
EPA3
EPA0
EPA1
EPA2
Bit 1
Address
0xA8
0xB0
0xB8
0xC0
0xE0
[1,1]
Address
Device
Bit 0
Size
32
32
8
8
8

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