CY8C5246AXI-038 Cypress Semiconductor Corp, CY8C5246AXI-038 Datasheet - Page 16

• Manufacturer Part Number: CY8C5246AXI-038
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5246AXI-038

• Lead Free Status / RoHS Status: Compliant

5.6 Memory Map
The Cortex-M3 has a fixed address map, which allows
peripherals to be accessed by simple memory access
instructions.
5.6.1 Address Map
The 4-GB address space is divided into the ranges shown in
Table
Table 5-2. Address Map
Document Number: 001-55034 Rev. *G
0x00000000 –
0x1FFFFFFF
0x20000000 –
0x3FFFFFFF
Address Range
5-2:
PHUB
0.5 GB Program code. This includes
0.5 GB Static RAM. This includes a 1
Size
Data,
Address,
and Control
Signals
Data,
Address,
Signals
Data,
Address,
and Control
Signals
and Control
the exception vector table at
power up, which starts at
address 0.
MByte bit-band region
starting at 0x20000000 and a
32 Mbyte bit-band alias
region starting at
0x22000000.
IO IF
PRELIMINARY
Use
EM Control
Signals
Figure 5-1. EMIF Block Diagram
EMIF
UDB
Data Signals
Address Signals
Control Signals
Signals
Other
Control
Table 5-2. Address Map (continued)
0x40000000 –
0x5FFFFFFF
0x60000000 –
0x9FFFFFFF
0xA0000000 –
0xDFFFFFFF
0xE0000000 –
0xFFFFFFFF
PSoC
Address Range
DSI to Port
DSI Dynamic Output
Control
PORTs
PORTs
PORTs
I/O
I/O
I/O
®
5: CY8C52 Family Datasheet
External _ MEM_ ADDR [23:0]
External _ MEM_ DATA[15:0]
0.5 GB Peripherals. This includes a 1
1 GB
1 GB
0.5 GB Internal peripherals, including
Size
Control
MByte bit-band region
starting at 0x40000000 and a
32 Mbyte bit-band alias
region starting at
0x42000000.
External RAM.
External peripherals.
the NVIC and debug and
trace modules.
Use
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