MC9S08QD2CSC Freescale, MC9S08QD2CSC Datasheet - Page 118

• Manufacturer Part Number: MC9S08QD2CSC
• Manufacturer: Freescale

Specifications of MC9S08QD2CSC

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Total Internal Ram Size: 128Byte
• # I/os (max): 4
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 4-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Program Memory Type: Flash
• Program Memory Size: 2KB
• Lead Free Status / RoHS Status: Compliant

Analog-to-Digital Converter (S08ADC10V1)
8.6.2.4
The ADC quantizes the ideal straight-line transfer function into 1024 steps (in 10-bit mode). Each step
ideally has the same height (1 code) and width. The width is defined as the delta between the transition
points to one code and the next. The ideal code width for an N bit converter (in this case N can be 8 or 10),
defined as 1
There is an inherent quantization error due to the digitization of the result. For 8-bit or 10-bit conversions
the code will transition when the voltage is at the midpoint between the points where the straight line
transfer function is exactly represented by the actual transfer function. Therefore, the quantization error
will be ± 1/2
conversion is only 1/2
8.6.2.5
The ADC may also exhibit non-linearity of several forms. Every effort has been made to reduce these
errors but the system must be aware of them because they affect overall accuracy. These errors are:
8.6.2.6
Analog-to-digital converters are susceptible to three special forms of error. These are code jitter,
non-monotonicity, and missing codes.
Code jitter is when, at certain points, a given input voltage converts to one of two values when sampled
repeatedly. Ideally, when the input voltage is infinitesimally smaller than the transition voltage, the
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Average the result by converting the analog input many times in succession and dividing the sum
of the results. Four samples are required to eliminate the effect of a 1
Reduce the effect of synchronous noise by operating off the asynchronous clock (ADACK) and
averaging. Noise that is synchronous to ADCK cannot be averaged out.
Zero-scale error (E
the actual code width of the first conversion and the ideal code width (1/2
conversion is $001, then the difference between the actual $001 code width and its ideal (1
used.
Full-scale error (E
the last conversion and the ideal code width (1.5
difference between the actual $3FE code width and its ideal (1
Differential non-linearity (DNL) — This error is defined as the worst-case difference between the
actual code width and the ideal code width for all conversions.
Integral non-linearity (INL) — This error is defined as the highest-value the (absolute value of the)
running sum of DNL achieves. More simply, this is the worst-case difference of the actual
transition voltage to a given code and its corresponding ideal transition voltage, for all codes.
Total unadjusted error (TUE) — This error is defined as the difference between the actual transfer
function and the ideal straight-line transfer function, and therefore includes all forms of error.
LSB
LSB
Code Width and Quantization Error
Linearity Errors
Code Jitter, Non-Monotonicity and Missing Codes
, is:
in 8- or 10-bit mode. As a consequence, however, the code width of the first ($000)
LSB
FS
ZS
and the code width of the last ($FF or $3FF) is 1.5
) — This error is defined as the difference between the actual code width of
) (sometimes called offset) — This error is defined as the difference between
MC9S08QD4 Series MCU Data Sheet, Rev. 6
1
LSB
= (V
REFH
- V
REFL
LSB
) / 2
). Note, if the last conversion is $3FE, then the
N
LSB
) is used.
LSB
LSB
, one-time error.
.
LSB
Freescale Semiconductor
). Note, if the first
Eqn. 8-2
LSB
) is