FW82371EB Q 657 Intel, FW82371EB Q 657 Datasheet - Page 18

• Manufacturer Part Number: FW82371EB Q 657
• Manufacturer: Intel

Specifications of FW82371EB Q 657

• Lead Free Status / RoHS Status: Not Compliant

Intel
Status:
3.
Problem:
Implication: Systems designs which depend on GPO value at reset or depend on default values of 0h will not work
Workaround: System designers should be aware of the new default values. For dedicated GPOs or multiplexed GPOs
Status:
18
®
82371EB (PIIX4E)
3. If there is a need to perform I/O trapping on an external IDE controller, set the PIIX4 to trap on the
This will not be fixed in PIIX4. This was incorporated into the PIIX4 Datasheet as a change to the
specification.
General Purpose Outputs default to Incorrect Values
The General Purpose Output register (Power Management Base + 34h,35h,36h,37h) incorrectly defaults
to 7FFFBFFFh instead of 00000000h.
correctly.
which default to GPO, and which require a specific value at reset, inverters may need to added or
removed from the system design. For GPOs which are multiplexed with other signals but which default
to a non-GPO signal, the BIOS must ensure that the proper value is written into the GPO register prior to
enabling the signal as a GPO.
This will not be fixed in PIIX4. This was incorporated into the PIIX4 Datasheet as a change to the
specification.
31
30:15
14
13:0
Register
e. If the trap occurs first, the IDE device is not idle. The BIOS then returns to step b. above
IDE access and enable the PIIX4 internal IDE controller. When the SMI is generated, the internal IDE
controller can be disabled, the external controller enabled, and the I/O cycle restarted.
(GP0 #)
Bits
0
1
0
1
Actual Default
Value
No GPO[31]
Comments
Specification Update
R