FW82371EB Q 657 Intel, FW82371EB Q 657 Datasheet - Page 20

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FW82371EB Q 657

Manufacturer Part Number
FW82371EB Q 657
Description
Manufacturer
Intel
Datasheet

Specifications of FW82371EB Q 657

Lead Free Status / RoHS Status
Not Compliant
Intel
5.
Problem:
Implication: The system will hang if the PIIX4 holds STPCLK# asserted indefinitely.
Workaround: The 87% thermal duty cycle (THRM_DTY) in the CNTB register, and the 87% throttle duty cycle
Status:
20
Status:
®
82371EB (PIIX4E)
STPCLK# Deassertion Time
Under certain conditions the PIIX4 can deassert STPCLK# for a short time. A short deassertion of
STPCLK# can cause the CPU to miss the STPCLK# transition. If the CPU misses the transition the
PIIX4 will continue to assert STPCLK# indefinitely.
(THTL_DTY) in the PCNTRL register is no longer supported. These bit positions are now reserved.
System BIOS must also disable system clock control before the PIIX4 begins thermal throttling.
If the THRM_EN bit is set and the SCI_EN bit is cleared, an SMI# is generated by the PIIX4 upon
assertion of the THRM# signal. The SMI# handler has 2 seconds to disable all system clock control
functionality before the PIIX4 begins thermal throttling.
If the THRM_EN bit is set and the SCI_EN bit is set, an SCI is generated by the PIIX4 upon assertion of
the THRM# signal. The interrupt handler has 2 seconds to disable all system clock control functionality
before the PIIX4 begins thermal throttling.
This will not be fixed on PIIX4. This will be incorporated into the PIIX4 Datasheet as a change to the
specification. This errata will be fixed in PIIX4E. In PIIX4E the 87% thermal duty cycle (THRM)DTY)
in the CNTB register, and the 87% throttle duty cycle (THRTL_DTY) in the PCNTRL register are
supported. Upon assertion of the THRM# signal, no wpeacial provisions need to be taken. The PIIX4E
will guarantee that STPCLK# signal stays high for at least 32 us.
This errata will not be fixed in PIIX4.
This errata will be incorporated into the next revision of the PIIX4 Datasheet as a specification
Intel is working with Microsoft* to incorporate the workaround into their UHCI driver.
Microsoft* will make this workaround available in the Beta 1 release of Memphis.
Microsoft* will provide a fix to the OSR2.1 (Detroit) release. OEMs/IHVs should contact
change.
Microsoft* for the fix distribution plans.
QH
TD
Pseudo
Pseudo
QH
TD
Bandwidth Reclamation Loop
QH
TD
QH
TD
TD
Specification Update
R

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