PNX1700EH/G,557 Trident Microsystems, Inc., PNX1700EH/G,557 Datasheet - Page 228

• Manufacturer Part Number: PNX1700EH/G,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of PNX1700EH/G,557

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Volume 1 of 1
Table 4: NAND Address Mux Table
PNX17XX_SER_1
Preliminary data sheet
Num. of
Addresses
3
3
2
2
1
3
t
t
t
Figure 2:
WH
WL
RL
: (REN_lo + 1) * pci_clk periodShown with REN_lo = 1
: (WEN_lo + 1) * pci_clk periodShown with WEN_lo = 0
: (WEN_hi + 1) * pci_clk period Shown with WEN_hi = 0
pci_clk
frame
WEN
REN
CLE
trdy
irdy
CS
IO
Read Status
Block size
SB
SB
SB
SB
SB
SB
The ACK may be monitored to determine when the device is ready prior to initiating
the DMA. Once the device is ready, no further monitoring of the ACK takes place. If
the amount of data to be transferred exceeds one segment, the max burst size should
be set to 128 to allow for pause in the transfer that allows the ACK to be monitored
between segments. Note that this approach will not pause at the correct location if the
spare area is being accessed.
Misc
Settings
64 MB, 8 bit
32 MB, 8 bit
64 MB, 8 bit
32 MB, 8 bit
Any MB, 8 bit addr[24:17]
32 MB, 8 bit
Examples of block erase, data read and write and status read are shown in the
following timing diagrams.
1st Address
addr[7:0]
addr[7:0]
addr[16:9]
addr[16:9]
addr[8:1]
command_a
Rev. 1 — 17 March 2006
t
WL
t
WH
2nd Address 3rd Address 4th Address
addr[16:9]
addr[16:9]
addr[24:17]
addr[24:17]
-NA-
addr[16:9]
addr[24:17]
addr[24:17]
addr[25]
-NA-
-NA-
adr[24:17]
t
status
RL
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
addr[25]
-NA-
-NA-
-NA-
-NA-
-NA-
Chapter 7: PCI-XIO Module
PNX17xx Series
7-7