PNX1700EH/G,557 Trident Microsystems, Inc., PNX1700EH/G,557 Datasheet - Page 768

• Manufacturer Part Number: PNX1700EH/G,557
• Manufacturer: Trident Microsystems, Inc.

Specifications of PNX1700EH/G,557

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Philips Semiconductors
Volume 1 of 1
3. Register Descriptions
Table 1: Register Summary
PNX17XX_SER_1
Preliminary data sheet
Offset
0x04 5000
0x04 5004
0x04 5008
0x04 500C
0x04 5010
0x04 5014
0x04 5018
0x04 501C
0x04 5020—
9FDC
0x04 5FE0
0x04 5FE4
0x04 5FE8
0x04 5FEC
0x04 5FF0
0x04 5FF4
0x04 5FF8
0x04 5FFC
Symbol
I2C_CONTROL
I2C_DAT
I2C_STATUS
I2C_ADDRESS
I2C_STOP
I2C_PD
I2C_SET_PINS
I2C_OBS_PINS
Reserved
I2C_INT_STATUS
I2C_INT_EN
I2C_INT_CLR
I2C_INT_SET
Reserved
I2C Powerdown
Reserved
Module ID
appropriate action to be taken for each of these status codes is detailed in the
Table
IIC module is in the master mode.
If the AA bit is reset during a transfer, the IIC module will transmit the last byte of the
transfer and enter state 0xC0 or 0xC8. The IIC module is switched to the “not
addressed” slave mode and will ignore the master receiver if it continues the transfer.
Thus the master receiver receives all 1s as serial data. While AA is reset, the IIC
module does not respond to its own slave address or a general call address.
However, the I
any time by setting AA. This means that the AA bit may be used to temporarily isolate
the IIC module from the I
5. The slave transmitter mode may also be entered if arbitration is lost while the
Description
Controls the operation mode of the IIC module
Byte of data to be transmitted or received
Indicates the status of the IIC module
Slave address of the IIC module
Set STO flag
Powerdown, reset IIC sampling clock registers except for MMIO registers
Set I
Observe I
Interrupt Status register
Interrupt Enable register
Interrupt Clear register
Interrupt software set register
Powerdown mode, switch module clock off
Module Identification and revision information
2
C bus SDA and/or SCL signals low
2
2
C bus is still monitored and address recognition may be resumed at
C bus SDA and SCL signals
Rev. 1 — 17 March 2006
2
C bus.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 25: I
2
C Interface
25-7