PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 192
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PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
Compliant
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PNX1300/01/02/11 Data Book
12.17.1.2 64-Mbit Devices
64-Mbit SDRAMS organized in x32 can be used to build
an 8-, 16-, 24-, or 32-MB memory system.
12-10
Figure 12-5. Schematic of a 8-MB memory system consisting of one 4×512K×32 SDRAM (one rank).
Figure 12-6. Schematic of a 16-MB memory system consisting of two ranks of 4×512K×32 SDRAM chips.
PRELIMINARY SPECIFICATION
MM_CLK[0]
MM_CS#[1]
MM_CLK[0]
MM_CS#[0]
MM_CLK[0]
MM_CS#[0]
Figure 12-5
CLK
Address[10:0]
Control
CS#
CLK
Control
CS#
Address[10:0]
BA[1:0]
BA[1:0]
BA[1:0]
CLK
Address[10:0]
Control
CS#
PNX1300
PNX1300
4×512K×32
4×512K×32
4×512K×32
SDRAM
SDRAM
SDRAM
DQM[3:0]
DQM[3:0]
DQ[31:0]
DQ[31:0]
shows an 8-MB memory system (one device only) and
Figure 12-6
order to build a 16-MB configuration.
DQM[3:0]
DQ[31:0]
MM_DQM[3:0]
MM_DQM[3:0]
MM_DQ[31:0]
MM_DQ[31:0]
details an extension of the block diagram in
Philips Semiconductors
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