PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 391
PNX1311EH/G
Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1311EHG.pdf
(548 pages)
Specifications of PNX1311EH/G
Lead Free Status / RoHS Status
Compliant
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PNX1300/01/02/11 Data Book
ifloatflags
SYNTAX
FUNCTION
DESCRIPTION
in rsrc1 to a single-precision IEEE floating-point value, and an integer bit vector representing the computed exception
flags is written into rdest. The bit vector stored in rdest has the same format as the IEEE exception bits in the PCSW.
The exception flags in PCSW are left unchanged by this operation. Rounding is according to the IEEE rounding mode
bits in PCSW.
the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
A-93
r30 = 3
r40 = 0xffffffff (-1)
r10 = 0, r50 = 0xfffffffd
r20 = 1, r50 = 0xfffffffd
r60 = 0x7fffffff (2147483647)
r70 = 0x80000000 (-2147483648)
r80 = 0x7ffffff1 (2147483633)
The
The
[ IF rguard ] ifloatflags rsrc1 → rdest
if rguard then
rdest ← ieee_flags((float) ((long)rsrc1))
ifloatflags
ifloatflags
31
0
Initial Values
PRELIMINARY SPECIFICATION
operation computes the IEEE exceptions that would result from converting the signed integer
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls
ifloatflags r30 → r100
ifloatflags r40 → r105
IF r10 ifloatflags r50 → r110
IF r20 ifloatflags r50 → r115
ifloatflags r60 → r117
ifloatflags r70 → r120
ifloatflags r80 → r122
IEEE status flags from convert signed integer to
Operation
7
0
OFZ
6
IFZ
5
INV
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ufloatflags ufloatrzflags
r100 ← 0
r105 ← 0
no change, since guard is false
r115 ← 0
r117 ← 0x02 (INX)
r120 ← 0
r122 ← 0x02 (INX)
OVF
ifloat ifloatrzflags
3
Philips Semiconductors
UNF
ATTRIBUTES
2
SEE ALSO
floating-point
Result
INX
1
DBZ
0
130
1, 4
falu
No
—
1
3
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