PNX1311EH/G NXP Semiconductors, PNX1311EH/G Datasheet - Page 398

PNX1311EH/G

Manufacturer Part Number
PNX1311EH/G
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1311EH/G

Lead Free Status / RoHS Status
Compliant
Philips Semiconductors
Signed immediate
SYNTAX
FUNCTION
DESCRIPTION
EXAMPLES
The
iimm(n) → rdest
rdest ← n
iimm
Initial Values
operation stores the signed 32-bit opcode modifier n into rdest. Note: this operation is not guarded.
iimm(2) → r10
iimm(0x100) → r20
iimm(0xfffc0000) → r30
Operation
PRELIMINARY SPECIFICATION
PNX1300/01/02/11 DSPCPU Operations
r10 ← 2
r20 ← 0x100
r30 ← 0xfffc0000
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ATTRIBUTES
SEE ALSO
Result
uimm
0x80000000
1, 2, 3, 4, 5
iimm
..0x7fffffff
32 bits
const
191
0
1
A-100

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