SAA7111AHZV4 NXP Semiconductors, SAA7111AHZV4 Datasheet - Page 52
SAA7111AHZV4
Manufacturer Part Number
SAA7111AHZV4
Description
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7111AHZV4.pdf
(72 pages)
Specifications of SAA7111AHZV4
Pin Count
64
Package Type
LQFP
Lead Free Status / RoHS Status
Compliant
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Philips Semiconductors
17.2.16 S
Table 31 Output control 1 SA 11
1998 May 15
Colour on (COLO)
Automatic colour killer
Colour forced on
Decoder VIP bypassed (VIPB)
DMSD data to YUV output
ADC data to YUV output; dependent on mode settings
Output enable horizontal/vertical sync (OEHV)
HS, HREF, VREF and VS high-impedance inputs
Outputs HS, HREF, VREF and VS active
Output enable YUV data (OEYC)
VPO-bus high-impedance inputs
Output VPO-bus active
Inverse composite blank (COMPO)
VREF is vertical reference
VREF is inverse composite blank
FEI control (FECO)
FEI sampling at CREF = LOW
(SAA7110 compatible); (see Fig.19)
FEI sampling at CREF = HIGH
Compatibility to SAA7199 (CM99)
Default value
To be set if SAA7199 (digital encoder) is used for
re-encoding in conjunction with RTCO
General purpose switch (GPSW)
Switches directly pin 64 GPSW
Enhanced Video Input Processor (EVIP)
UBADDRESS
11
FUNCTION
52
BIT NAME
COMPO
COMPO
GPSW
GPSW
COLO
COLO
OEHV
OEHV
OEYC
OEYC
FECO
FECO
CM99
CM99
VIPB
VIPB
LOGIC LEVEL
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Product specification
SAA7111A
CONTROL BIT
D0
D0
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
D7
D7
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