SCAN926260TUF National Semiconductor, SCAN926260TUF Datasheet - Page 14

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SCAN926260TUF

Manufacturer Part Number
SCAN926260TUF
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of SCAN926260TUF

Number Of Elements
6
Input Type
CMOS/TTL
Operating Supply Voltage (typ)
3.3V
Differential Input High Threshold Voltage
50mV
Diff. Input Low Threshold Volt
-50mV
Output Type
Deserializer
Transmission Data Rate
660Mbps
Power Dissipation
3.7W
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
196
Package Type
LBGA
Number Of Receivers
1
Number Of Drivers
10
Lead Free Status / RoHS Status
Not Compliant

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(CRC or CLC). If employed, a separate pie filter is recom-
mended for each PLL to minimize drop in potential due to the
series resistance. Separate power planes for the PVDD pins
is typically not required.
AVDD = LVDS SECTION POWER SUPPLY
The AVDD pin supplies the LVDS portion of the circuit. The
SCAN926260 has four AVDD pins. Due to the nature of the
design, current draw is not excessive on these pins. A 0.1uF
capacitor is sufficient for these pins. If space is available, the
0.01uF capacitor may be used in parallel with the 0.1uF ca-
pacitor for additional high frequency filtering.
(Only one power/ground for each supply type shown for clarity-bypass networks should be repeated for all power/ground
FIGURE 11. Optional Additional External Failsafe Biasing
FIGURE 10. Typical Application Circuit
pairs.)
14
GROUNDs
The AGND pin should be connected to the signal common in
the cable for the return path of any common-mode current.
Most of the LVDS current will be odd-mode and return within
the interconnect pair. A small amount of current may be even-
mode due to coupled noise and driver imbalances. This cur-
rent should return via a low impedance known path.
For a typical application circuit, please see Figure 10.
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