3336-52 Peregrine Semiconductor, 3336-52 Datasheet - Page 6

• Manufacturer Part Number: 3336-52
• Description: IC PLL INTEGER-N 300MHZ 48-QFN
• Manufacturer: Peregrine Semiconductor

Specifications of 3336-52

• Function: Integer-N PLL
• Frequency: 3GHz
• Rf Type: General Purpose
• Secondary Attributes: Divide by 10,11
• Package / Case: 48-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 1046-1014-2

Table 6. AC Characteristics:
Notes: 1. Parameter is guaranteed through characterization only and is not tested.
©2005-2011 Peregrine Semiconductor Corp. All rights reserved.
Page 6 of 13
Control Interface and Latches (see Figures 3, 4, 5)
Main Divider (Including Prescaler)
Main Divider (Prescaler Bypassed)
Reference Divider
Phase Detector
Symbol
t
2. Running at low frequencies (< 10 MHz sinewave), the device will still be functional but may cause phase noise degradation. Inserting a low-noise amplifier to
t
t
t
t
t
t
P
P
DHLD
t
f
ClkH
CWR
t
WRC
t
MDO
F
F
P
V
ClkL
DSU
3. CMOS logic levels may be used if DC coupled. For optimum phase noise performance, the reference input falling edge rate should be faster than 80mV/ns.
Clk
PW
CE
EC
f
f
Fin
Fin
c
in
in
r
fr
fr
square up the edges is recommended at lower input frequencies.
Serial data clock frequency
Serial clock HIGH time
Serial clock LOW time
Sdata set-up time after Sclk rising edge, D[7:0] set-up time to
M1_WR, M2_WR, A_WR, E_WR rising edge
Sdata hold time after Sclk rising edge, D[7:0] hold time to
M1_WR, M2_WR, A_WR, E_WR rising edge
S_WR, M1_WR, M2_WR, A_WR, E_WR pulse width
Sclk rising edge to S_WR rising edge. S_WR, M1_WR,
M2_WR, A_WR falling edge to Hop_WR rising edge
Sclk falling edge to E_WR transition
S_WR falling edge to Sclk rising edge. Hop_WR falling edge
to S_WR, M1_WR, M2_WR, A_WR rising edge
E_WR transition to Sclk rising edge
MSEL data out delay after Fin rising edge
Operating frequency
Input level range
Operating frequency
Input level range
Operating frequency
Reference input power
Input sensitivity
Comparison frequency
V
Parameter
DD
= 3.0 V, -40° C < T
A
< 85 °C, unless otherwise specified
C
External AC coupling
External AC coupling
(Note 1)
Single ended input
External AC coupling
(Note 3)
(Note 1)
L
= 12 pf
Conditions
Document No. 70-0033-05 │ UltraCMOS™ RFIC Solutions
(Note 2)
Min
500
0.5
30
30
10
10
30
30
30
30
30
50
-5
-5
-2
3000
Max
300
100
Product Specification
10
10
20
8
5
5
PE3336
Units
MHz
MHz
dBm
MHz
dBm
MHz
dBm
MHz
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
P-P