XC6VSX475T-2FFG1759E Xilinx Inc, XC6VSX475T-2FFG1759E Datasheet - Page 26

• Manufacturer Part Number: XC6VSX475T-2FFG1759E
• Description: IC FPGA VIRTEX 1759FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™ 6 SXTr

Specifications of XC6VSX475T-2FFG1759E

• Number Of Logic Elements/cells: 476160
• Number Of Labs/clbs: 37200
• Total Ram Bits: 39223296
• Number Of I /o: 840
• Number Of Gates: -
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1759-BBGA, FCBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: XC6VSX475T-2FFG1759I; XC6VSX475T-2FFG1759I

IOB Pad Input/Output/3-State Switching Characteristics
Table 44
on standard) and 3-state delays.
T
on the capability of the SelectIO input buffer.
T
depending on the capability of the SelectIO output buffer.
T
disabled. The delay varies depending on the SelectIO capability of the output buffer.
Table 45
output buffer of an IOB pad, when 3-state is enabled (i.e., a high impedance state).
Table 44: IOB Switching Characteristics
DS152 (v3.2) April 1, 2011
Product Specification
LVDS_25
LVDSEXT_25
HT_25
BLVDS_25
RSDS_25 (point to point)
HSTL_I
HSTL_II
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL2_I
SSTL2_II
SSTL15
LVCMOS25, Slow, 2 mA
LVCMOS25, Slow, 4 mA
LVCMOS25, Slow, 6 mA
LVCMOS25, Slow, 8 mA
LVCMOS25, Slow, 12 mA
LVCMOS25, Slow, 16 mA
LVCMOS25, Slow, 24 mA
LVCMOS25, Fast, 2 mA
LVCMOS25, Fast, 4 mA
LVCMOS25, Fast, 6 mA
LVCMOS25, Fast, 8 mA
LVCMOS25, Fast, 12 mA
LVCMOS25, Fast, 16 mA
IOPI
IOOP
IOTP
is described as the delay from IOB pad through the input buffer to the I-pin of an IOB pad. The delay varies depending
is described as the delay from the T pin to the IOB pad through the output buffer of an IOB pad, when 3-state is
is described as the delay from the O pin to the IOB pad through the output buffer of an IOB pad. The delay varies
summarizes the values of standard-specific data input delay adjustments, output delays terminating at pads (based
summarizes the value of T
I/O Standard
IOTPHZ
0.85
0.85
0.85
0.85
0.85
0.81
0.81
0.81
0.81
0.81
0.81
0.81
0.81
0.81
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
0.51
-3
. T
Speed Grade
0.94
0.94
0.94
0.94
0.94
0.91
0.91
0.91
0.91
0.91
0.91
0.91
0.91
0.91
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
0.57
IOTPHZ
-2
T
IOPI
1.09
1.09
1.09
1.09
1.09
1.06
1.06
1.06
1.06
1.06
1.06
1.06
1.06
1.06
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
0.66
is described as the delay from the T pin to the IOB pad through the
-1
www.xilinx.com
Virtex-6 FPGA Data Sheet: DC and Switching Characteristics
1.08
1.08
1.08
1.08
1.08
1.06
1.06
1.06
1.06
1.06
1.06
1.06
1.06
1.06
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
0.70
-1L
1.45
1.53
1.51
1.39
1.45
1.45
1.44
1.42
1.47
1.50
1.42
1.49
1.42
1.42
5.09
3.30
2.62
2.21
1.80
1.89
1.68
5.12
3.28
2.56
2.11
1.74
1.77
-3
Speed Grade
1.54
1.65
1.62
1.50
1.54
1.56
1.56
1.54
1.58
1.62
1.54
1.60
1.54
1.54
5.46
3.49
2.81
2.41
1.95
2.05
1.82
5.49
3.50
2.73
2.33
1.88
1.92
-2
T
IOOP
1.68
1.84
1.78
1.67
1.68
1.73
1.74
1.71
1.75
1.81
1.71
1.77
1.72
1.71
6.01
3.79
3.08
2.72
2.17
2.29
2.02
6.04
3.82
2.99
2.65
2.08
2.13
-1
1.62
1.73
1.69
1.65
1.62
1.71
1.72
1.69
1.72
1.78
1.69
1.74
1.71
1.69
5.63
3.65
2.95
2.59
2.10
2.21
1.98
5.62
3.65
2.88
2.53
2.03
2.08
-1L
1.45
1.53
1.51
1.39
1.45
1.45
1.44
1.42
1.47
1.50
1.42
1.49
1.42
1.42
5.09
3.30
2.62
2.21
1.80
1.89
1.68
5.12
3.28
2.56
2.11
1.74
1.77
-3
Speed Grade
1.54
1.65
1.62
1.50
1.54
1.56
1.56
1.54
1.58
1.62
1.54
1.60
1.54
1.54
5.46
3.49
2.81
2.41
1.95
2.05
1.82
5.49
3.50
2.73
2.33
1.88
1.92
-2
T
IOTP
1.68
1.84
1.78
1.67
1.68
1.73
1.74
1.71
1.75
1.81
1.71
1.77
1.72
1.71
6.01
3.79
3.08
2.72
2.17
2.29
2.02
6.04
3.82
2.99
2.65
2.08
2.13
-1
1.62
1.73
1.69
1.65
1.62
1.71
1.72
1.69
1.72
1.78
1.69
1.74
1.71
1.69
5.63
3.65
2.95
2.59
2.10
2.21
1.98
5.62
3.65
2.88
2.53
2.03
2.08
-1L
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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