LCMXO256C-3MN100I Lattice, LCMXO256C-3MN100I Datasheet - Page 20

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LCMXO256C-3MN100I

Manufacturer Part Number
LCMXO256C-3MN100I
Description
IC PLD 256LUTS 78I/O 100CSBGA
Manufacturer
Lattice
Datasheet

Specifications of LCMXO256C-3MN100I

Programmable Type
*
Number Of Macrocells
*
Voltage - Input
*
Speed
*
Mounting Type
*
Package / Case
*
Package
100CSBGA
Family Name
MachXO
Number Of Macro Cells
128
Maximum Propagation Delay Time
4.9 ns
Number Of User I/os
78
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Memory Type
SRAM
Operating Temperature
-40 to 100 °C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1049

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Maxim
Quantity:
3 120
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Table 2-8. I/O Support Device by Device
Table 2-9. Supported Input Standards
Number of I/O Banks
Type of Input Buffers
Types of Output Buffers
Differential Output 
Emulation Capability
PCI Support
Single Ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI
Differential Interfaces
BLVDS
1. Top Banks of MachXO1200 and MachXO2280 devices only.
2. MachXO1200 and MachXO2280 devices only.
2
Single-ended 
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
1
2
MachXO256
, LVDS
Input Standard
2
, LVPECL
2
, RSDS
4
Single-ended 
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
All I/O Banks
No
MachXO640
2
2-17
3.3V
Yes
Yes
Yes
Yes
Yes
Yes
2.5V
Yes
Yes
Yes
Yes
Yes
VCCIO (Typ.)
8
Single-ended 
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
All I/O Banks
Top side only
1.8V
Yes
Yes
Yes
Yes
Yes
Yes
MachXO1200
MachXO Family Data Sheet
1.5V
Yes
Yes
Yes
Yes
Yes
Yes
1.2V
Yes
Yes
Yes
Yes
Yes
8
Single-ended 
(all I/O Banks)
Differential Receivers
(all I/O Banks)
Single-ended buffers
with complementary
outputs (all I/O Banks)
Differential buffers with
true LVDS outputs (50%
on left and right side)
Top side only
All I/O Banks
MachXO2280
Architecture

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