LCMXO256C-3MN100I Lattice, LCMXO256C-3MN100I Datasheet - Page 94
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LCMXO256C-3MN100I
Manufacturer Part Number
LCMXO256C-3MN100I
Description
IC PLD 256LUTS 78I/O 100CSBGA
Manufacturer
Lattice
Datasheet
1.LCMXO1200C-3FTN256I.pdf
(96 pages)
Specifications of LCMXO256C-3MN100I
Programmable Type
*
Number Of Macrocells
*
Voltage - Input
*
Speed
*
Mounting Type
*
Package / Case
*
Package
100CSBGA
Family Name
MachXO
Number Of Macro Cells
128
Maximum Propagation Delay Time
4.9 ns
Number Of User I/os
78
Typical Operating Supply Voltage
1.8|2.5|3.3 V
Memory Type
SRAM
Operating Temperature
-40 to 100 °C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1049
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Maxim
Quantity:
3 120
Company:
Part Number:
LCMXO256C-3MN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
www.latticesemi.com
© 2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
July 2010
Revision History
November 2005
December 2005
February 2005
October 2005
April 2006
Date
Version
01.0
01.1
01.2
01.3
02.0
Ordering Information
Ordering Information
Pinout Information
Pinout Information
DC and Switching
DC and Switching
Characteristics
Characteristics
Supplemental
Architecture
Architecture
Introduction
Introduction
Information
Section
—
Initial release.
Distributed RAM information in family table updated. Added footnote 1 -
fpBGA packaging to the family selection guide.
sysIO Buffer section updated.
Hot Socketing section updated.
Sleep Mode section updated.
SLEEP Pin Characteristics section updated.
Oscillator section updated.
Security section updated.
Recommended Operating Conditions table updated.
DC Electrical Characteristics table updated.
Supply Current (Sleep Mode) table added with LCMXO256/640 data.
Supply Current (Standby) table updated with LCMXO256/640 data.
Initialization Supply Current table updated with LCMXO256/640 data.
Programming and Erase Flash Supply Current table updated with
LCMXO256/640 data.
Register-to-Register Performance table updated (rev. A 0.16).
External Switching Characteristics table updated (rev. A 0.16).
Internal Timing Parameter table updated (rev. A 0.16).
Family Timing Adders updated (rev. A 0.16).
sysCLOCK Timingupdated (rev. A 0.16).
MachXO "C" Sleep Mode Timing updated (A 0.16).
JTAG Port Timing Specification updated (rev. A 0.16).
SLEEPIN description updated.
Pin Information Summary updated.
Power Supply and NC Connection table has been updated.
Logic Signal Connection section has been updated to include all
devices/packages.
Part Number Description section has been updated.
Ordering Part Number section has been updated (added LCMXO256C/
LCMXO640C "4W").
MachXO Density Migration Technical Note (TN1097) added.
Added “Power Supply and NC Connections” summary information for
LCMXO1200 and LCMXO2280 in 100 TQFP package.
Supply Current (Standby) table updated with LCMXO1200/2280 data.
Ordering Part Number section updated (added LCMXO2280C "4W").
Introduction paragraphs updated.
Architecture Overview paragraphs updated.
7-1
MachXO Family Data Sheet
Change Summary
Revision History
Data Sheet DS1002