STM32F217ZGT6 STMicroelectronics, STM32F217ZGT6 Datasheet - Page 120

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STM32F217ZGT6

Manufacturer Part Number
STM32F217ZGT6
Description
MCU ARM 1024KB FLASH 144LQFP
Manufacturer
STMicroelectronics
Series
STM32r
Datasheets

Specifications of STM32F217ZGT6

Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, LIN, MMC, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
114
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
132K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 24x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Cpu Family
STM32
Device Core
ARM Cortex-M3
Device Core Size
32b
Frequency (max)
120MHz
Total Internal Ram Size
132KB
# I/os (max)
114
Number Of Timers - General Purpose
14
Operating Supply Voltage (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
1.8V
On-chip Dac
2(2-chx12-bit)
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
144
Package Type
LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
497-11189

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Electrical characteristics
120/158
Figure 56. Asynchronous multiplexed PSRAM/NOR write waveforms
Table 70.
1. C
2. Preliminary values.
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NWE_NE)
w(NWE)
h(NE_NWE)
v(A_NE)
v(NADV_NE)
w(NADV)
h(AD_NADV)
h(A_NWE)
v(BL_NE)
h(BL_NWE)
v(Data_NADV)
h(Data_NWE)
Symbol
L
= 15 pF.
FSMC_NBL[1:0]
FSMC_ AD[15:0]
FSMC_A[25:16]
FSMC_NADV
FSMC_NWE
FSMC_NOE
FSMC_NEx
Asynchronous multiplexed PSRAM/NOR write timings
FSMC_NE low time
FSMC_NEx low to FSMC_NWE low
FSMC_NWE low time
FSMC_NWE high to FSMC_NE high hold time
FSMC_NEx low to FSMC_A valid
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
FSMC_AD (address) valid hold time after
FSMC_NADV high
Address hold time after FSMC_NWE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NWE high
FSMC_NADV high to Data valid
Data hold time after FSMC_NWE high
Doc ID 17050 Rev 4
Parameter
t
v(NADV_NE)
t
t
t
v(A_NE)
v(A_NE)
t
t
v(NWE_NE)
v(BL_NE)
w(NADV)
Address
Address
t
t
t
v(Data_NADV)
w(NE)
h(AD_NADV)
NBL
t
w(NWE)
t
h(BL_NWE)
t
h(A_NWE)
Data
5T
2T
2T
T
3
T
T
4T
T
T
STM32F215xx, STM32F217xx
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
HCLK
Min
– 1
– 1
– 3
– 1.5
– 5
– 1
– 1
(1)(2)
t
5T
2T
2T
7
5
T
1.6
T
h(Data_NWE)
t
HCLK
HCLK
h(NE_NWE)
HCLK
HCLK
HCLK
Max
+ 1
+ 1.5
+ 2
+ 1
+ 2
ai14891B
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit

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