ICS951402AGLF IDT, Integrated Device Technology Inc, ICS951402AGLF Datasheet - Page 16

IC TIMING CTRL HUB P4 48-TSSOP

ICS951402AGLF

Manufacturer Part Number
ICS951402AGLF
Description
IC TIMING CTRL HUB P4 48-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS951402AGLF

Input
Crystal
Output
Clock
Frequency - Max
210MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Frequency-max
210MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
951402AGLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS951402AGLFT
Manufacturer:
IDT/PBF
Quantity:
363
0660—05/05/05
Core Supply Voltage . . . . . . . . . . . . . . . . . . . . . . 4.6 V
I/O Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND –0.5 V to V
Ambient Operating Temperature . . . . . . . . . . . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Case Temperature . . . . . . . . . . . . . . . . . . . . . . . . 115°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are
stress specifications only and functional operation of the device at these or any other conditions above those listed in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect product reliability.
T
1
2
Absolute Maximum Ratings
Electrical Characteristics - Input/Supply/Common Output Parameters
Guaranteed by design, not 100% tested in production.
See timing diagrams for buffered and un-buffered timing requirements.
A
Operating Supply Current
= 0 - 70C; Supply Voltage V
Powerdown Current
Input Capacitance
Input High Voltage
Clk Stabilization
Input High Current
Input Low Voltage
Input Low Current
Input Frequency
Pin Inductance
PARAMETER
Integrated
Circuit
Systems, Inc.
Delay
1
1,2
1
SYMBOL
DD
t
t
I
I
I
PZH
PHZ
DD3.3OP
DD3.3OP
DD3.3PD
T
C
C
= 3.3 V +/-5%
L
V
V
I
I
C
STAB
I
IL1
IL2
F
OUT
IH
pin
INX
,t
,t
IH
IL
IN
i
PZL
PLZ
Output disable delay (all outputs)
From PowerUp or deassertion of
Output enable delay (all outputs)
V
IN
V
C
C
IN
L
L
PowerDown to 1st clock.
= 0 V; Inputs with no pull-up
Output pin capacitance
= Full load; Select @ 100
=Full load; Select @ 133
= 0 V; Inputs with pull-up
CONDITIONS
X1 & X2 pins
Logic Inputs
IREF=5 mA
V
16
V
resistors
resistors
DD
IN
MHz
MHz
= 3.3 V
= V
DD
DD
+0.5 V
V
MIN
-200
229
220
0.3
27
SS
-5
-5
2
1
1
Advance Information
-
14.32
TYP
38.1
230
233
36
1
MAX
+0.3
V
360
360
0.8
1.8
45
45
10
10
5
7
5
6
ICS951402
DD
UNITS
MHz
mA
mA
mA
mA
mA
ms
nH
pF
pF
pF
ns
ns
V
V

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