ICS951402AGLF IDT, Integrated Device Technology Inc, ICS951402AGLF Datasheet - Page 4

IC TIMING CTRL HUB P4 48-TSSOP

ICS951402AGLF

Manufacturer Part Number
ICS951402AGLF
Description
IC TIMING CTRL HUB P4 48-TSSOP
Manufacturer
IDT, Integrated Device Technology Inc
Type
Timing Control Hubr
Datasheet

Specifications of ICS951402AGLF

Input
Crystal
Output
Clock
Frequency - Max
210MHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Frequency-max
210MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
951402AGLF

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ICS951402AGLFT
Manufacturer:
IDT/PBF
Quantity:
363
*See notes on the following page
0660—05/05/05
How to Write:
• Controller (host) sends a start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte location = N
• ICS clock will acknowledge
• Controller (host) sends the data byte count = X
• ICS clock will acknowledge
• Controller (host) starts sending Byte N through
• ICS clock will acknowledge each byte one at a time
• Controller (host) sends a Stop bit
Byte N + X -1
(see Note 2)
WR
P
T
Beginning Byte N
Data Byte Count = X
Slave Address D2
Beginning Byte = N
Controller (Host)
Byte N + X - 1
Index Block Write Operation
Integrated
Circuit
Systems, Inc.
General I
starT bit
stoP bit
WRite
(H)
2
C serial interface information for the ICS951402
ICS (Slave/Receiver)
.
ACK
ACK
ACK
ACK
ACK
(H)
4
How to Read:
• Controller (host) will send start bit.
• Controller (host) sends the write address D2
• ICS clock will acknowledge
• Controller (host) sends the begining byte
• ICS clock will acknowledge
• Controller (host) will send a separate start bit.
• Controller (host) sends the read address D3
• ICS clock will acknowledge
• ICS clock will send the data byte count = X
• ICS clock sends Byte N + X -1
• ICS clock sends Byte 0 through byte X (if X
• Controller (host) will need to acknowledge each
• Controllor (host) will send a not acknowledge bit
• Controller (host) will send a stop bit
location = N
was written to byte 8)
byte
WR
RD
RT
N
T
P
Slave Address D2
Beginning Byte = N
Slave Address D3
Controller (Host)
Index Block Read Operation
Not acknowledge
ACK
ACK
Repeat starT
starT bit
stoP bit
WRite
ReaD
Advance Information
(H)
(H)
.
ICS (Slave/Receiver)
Data Byte Count = X
Beginning Byte N
Byte N + X - 1
ICS951402
ACK
ACK
ACK
(H)
(H)
(H)

Related parts for ICS951402AGLF