SI5017-D-GM Silicon Laboratories Inc, SI5017-D-GM Datasheet - Page 16

IC CLOCK/DATA RECOVERY 28MLP

SI5017-D-GM

Manufacturer Part Number
SI5017-D-GM
Description
IC CLOCK/DATA RECOVERY 28MLP
Manufacturer
Silicon Laboratories Inc
Type
Clock and Data Recovery (CDR)r
Datasheet

Specifications of SI5017-D-GM

Input
Differential
Output
CML
Frequency - Max
2.7GHz
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
2.7GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
336-1279
Si5017
4.17. Differential Input Circuitry
The Si5017 provides differential inputs for both the high-speed data (DIN) and the reference clock (REFCLK)
inputs. An example termination for these inputs is shown in Figures 10 and 11, respectively. In applications where
direct dc coupling is possible, the 0.1 µF capacitors may be omitted. (LOS operation is only guaranteed when ac
coupled.) The data input limiting amplifier requires an input signal with a differential peak-to-peak voltage as
specified in Table 2 on page 7 to ensure a BER of at least 10
voltage requirement is also specified in Table 2.
16
Clock source
TIA
Figure 10. Input Termination for REFCLK (ac coupled)
Figure 11. Input Termination for DIN (ac coupled)
0.1 F
0.1 F
0.1 F
0.1 F
Zo = 50 
Zo = 50 
Zo = 50 
Zo = 50 
100 
RFCLK +
RFCLK –
DIN+
DIN–
Rev. 1.5
2.5 k
10 k
50 
50 
Si5017
Si5017
2.5 V (±5%)
–12
GND
2.5 k
10 k
. The REFCLK input differential peak-to-peak
2.5 V (±5%)
GND
5 k
7.5 k

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