IDT82V3280PFG IDT, Integrated Device Technology Inc, IDT82V3280PFG Datasheet - Page 31

• Manufacturer Part Number: IDT82V3280PFG
• Description: IC PLL WAN SE STRATUM 2 100-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Clock Generatorr

Specifications of IDT82V3280PFG

• Input: CMOS, LVDS, PECL, TTL
• Output: CMOS, LVDS, PECL, TTL
• Frequency - Max: 622.08MHz
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: 622.08MHz
• Function: Wan PLL
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Package Type: TQFP
• Pin Count: 100
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 82V3280PFG

3.9
the ones supported by T4 DPLL for T0 path is the main one. T0 DPLL
supports three primary operating modes: Free-Run, Locked and Hold-
over, and three secondary, temporary operating modes: Pre-Locked,
Pre-Locked2 and Lost-Phase. T4 DPLL supports three operating
modes: Free-Run, Locked and Holdover. The operating modes of T0
DPLL and T4 DPLL can be switched automatically or by force, as con-
trolled by the T0_OPERATING_MODE[2:0] / T4_OPERATING_
MODE[2:0] bits respectively.
switch is under external control and the status of the selected input clock
takes no effect to the operating mode selection. The forced operating
mode switch is applicable for special cases, such as testing.
state machines for T0 and for T4 automatically determine the operating
mode respectively.
Functional Description
IDT82V3280
The operating modes supported by T0 DPLL are more complex than
When the operating mode is switched by force, the operating mode
When the operating mode is switched automatically, the internal
SELECTED INPUT CLOCK STATUS VS. DPLL
OPERATING MODE
31
3.9.1
T0_OPERATING_MODE[2:0] bits, as shown in
Table 15: T0 DPLL Operating Mode Control
the internal state machine is shown in
automatically, the current operating mode is always indicated by the
T0_DPLL_OPERATING_MODE[2:0] bits. When the operating mode
switches, the T0_OPERATING_MODE
T0_OPERATING_MODE
The
When the operating mode is switched automatically, the operation of
Whether the operating mode is under external control or is switched
T0_OPERATING_MODE[2:0]
T0
T0 SELECTED INPUT CLOCK VS. DPLL OPERATING
MODE
DPLL
000
001
010
100
101
110
111
operating
2
bit is ‘1’, an interrupt will be generated.
mode
Figure
T0 DPLL Operating Mode
1
Forced - Pre-Locked2
Forced - Pre-Locked
Forced - Lost-Phase
7.
Forced - Free-Run
Forced - Holdover
is
bit will be set. If the
Forced - Locked
Table
Automatic
controlled
December 9, 2008
15:
WAN PLL
by
the