MPC972FA Freescale Semiconductor, MPC972FA Datasheet

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MPC972FA

Manufacturer Part Number
MPC972FA
Description
IC PLL CLOCK DRIVER 52-LQFP
Manufacturer
Freescale Semiconductor
Type
Clock Driver, Fanout Distribution, Multiplexerr
Datasheet

Specifications of MPC972FA

Pll
Yes with Bypass
Input
LVCMOS, LVTTL
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
4:12
Differential - Input:output
No/No
Frequency - Max
125MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
125MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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MPC972FA
Manufacturer:
Motorola
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MOT
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20 000
Low Voltage PLL Clock Driver
targeted for high performance CISC or RISC processor based systems.
With output frequencies of up to 125 MHz and skews of 550 ps the MPC972
is ideally suited for most synchronous systems. The device offers twelve low
skew outputs plus a feedback and sync output for added flexibility and ease
of system implementation.
• Fully Integrated PLL
• Output Frequency up to 125 MHz
• Compatible with PowerPC and Pentium Microprocessors
• LQFP Packaging
• 3.3 V V
• ± 100 ps Typical Cycle–to–Cycle Jitter
between the 12 outputs as well as the input vs output relationships. Using
the select lines output frequency ratios of 1:1, 2:1, 3:1, 3:2, 4:1, 4:3, 5:1, 5:2,
5:3, 6:1 and 6:5 between outputs can be realized by pulsing low one clock
edge prior to the coincident edges of the Qa and Qc outputs. The Sync
output will indicate when the coincident rising edges of the above
relationships will occur. The selectability of the feedback frequency is
independent of the output frequencies, this allows for very flexible
programming of the input reference vs output frequency relationship. The
output frequencies can be either odd or even multiples of the input
reference. In addition the output frequency can be less than the input
frequency for applications where a frequency needs to be reduced by a
non–binary factor. The Power–On Reset ensures proper programming if the
frequency select pins are set at power up. If the fselFB2 pin is held high, it
m a y b e n e c e s s a r y t o a p p l y a r e s e t a f t e r p o w e r – u p t o e n s u r e
synchronization between the QFB output and the other outputs. The internal
power–on reset is designed to provide this function, but with power–up
conditions being dependent, it is difficult to guarantee. All other conditions of
the fsel pins will automatically synchronize during PLL lock acquisition.
well as provide unique opportunities for system power down schemes to meet the requirements of “green” class machines. The
MPC972 allows for the enabling of each output independently via a serial input port. When disabled or “frozen” the outputs will be
locked in the “LOW” state, however the internal state machines will continue to run. Therefore when “unfrozen” the outputs will
activate synchronous and in phase with those outputs which were not frozen. The freezing and unfreezing of outputs occurs only
when they are already in the “LOW” state, thus the possibility of runt pulse generation is eliminated. A power-on reset will ensure
that upon power up all of the outputs will be active. Note that all of the control inputs on the MPC972 have internal pull–up resistors.
compatible levels while the outputs provide LVCMOS levels with the capability to drive 50 Ω transmission lines. For series
terminated lines each MPC972 output can drive two 50 Ω lines in parallel thus effectively doubling the fanout of the device.
AN1545/D in the Advanced Clock Drivers Device Data book (DL207/D) for a discussion on the thermal issues with the MPC family
of clock drivers.
PowerPC is a trademark of International Business Machines Corporation. Pentium is a trademark of Intel Corporation.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
The MPC972 is a 3.3 V compatible, PLL based clock driver device
The MPC972 features an extensive level of frequency programmability
The MPC972 offers a very flexible output enable/disable scheme. This enable/disable scheme helps facilitate system debug as
The MPC972 is fully 3.3 V compatible and requires no external loop filter components. All inputs accept LVCMOS/LVTTL
The MPC972 can consume significant power in some configurations. Users are encouraged to review Application Note
Motorola, Inc. 2001
CC
PLL CLOCK DRIVER
52–LEAD LQFP PACKAGE
LOW VOLTAGE
MPC972
CASE 848D-03
FA SUFFIX
SCALE 2:1
Order Number: MPC972/D
Rev 6, 09/2001
t

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MPC972FA Summary of contents

Page 1

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver The MPC972 is a 3.3 V compatible, PLL based clock driver device targeted for high performance CISC or RISC processor based systems. With output frequencies 125 MHz and ...

Page 2

MPC972 FUNCTION TABLE 1 fsela1 fsela0 Qa ÷ ÷ ÷ ÷ FUNCTION TABLE 2 *fselFB2 fselFB1 fselFB0 ...

Page 3

MOTOROLA ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ Figure 2. Logic Diagram MPC972 3 ...

Page 4

MPC972 ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ ÷ 4 1:1 Mode 2:1 Mode 3:1 Mode 3:2 Mode 4:1 Mode 4:3 Mode 6:1 Mode Figure 3. Timing Diagrams MOTOROLA ...

Page 5

ABSOLUTE MAXIMUM RATINGS* Symbol V Supply Voltage CC V Input Voltage I I Input Current IN T Storage Temperature Range Stor * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these ...

Page 6

MPC972 AC CHARACTERISTICS (T = 0° to 70° Symbol Characteristic Output Rise/Fall Time Output Duty Cycle pw t SYNC to Feedback pd Propagation Delay t Output-to-Output Skew os f VCO Lock Range ...

Page 7

SYNC Output Description In situations where output frequency relationships are not integer multiples of each other there is a need for a signal for system synchronization purposes. The SYNC output of the MPC972 is designed to specifically address this need. ...

Page 8

MPC972 MPC972 Figure 6. Programming Configuration Example Figure 8. Generating MPC604 Clocks from Ethernet Clocks MPC972 Figure 9. Phase Delay Using Multiple MPC972’s 8 MPC972 Figure 7. Generating Pentium Clocks from Floppy Clock MPC972 MPC972 ° ° ° ° MOTOROLA ...

Page 9

Using the On–Board Crystal Oscillator The MPC972 features an on–board crystal oscillator to allow for seed clock generation as well as final distribution. The on–board oscillator is completely self contained so that the only external component required is the crystal. ...

Page 10

MPC972 MPC972. From the data sheet the I VCCA sourced through the V pin) is typically 15 mA (20 mA CCA maximum), assuming that a minimum of 2.935 V must be maintained on the V pin very little DC voltage ...

Page 11

Figure 12. Single versus Dual Waveforms Ω Ω Ω 7 Ω Ω Ω Ω Ω 25 Ω Ω Figure 13. Optimized Dual Line Termination SPICE level output buffer models are ...

Page 12

MPC972 VIEW Y 3X –L– –N– –H– –T– SEATING 4X PLANE C2 C1 VIEW AA 12 OUTLINE DIMENSIONS FA SUFFIX LQFP PACKAGE CASE 848D–03 ISSUE TIPS ...

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MOTOROLA NOTES MPC972 13 ...

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MPC972 14 NOTES MOTOROLA ...

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MOTOROLA NOTES MPC972 15 ...

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MPC972 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out ...

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