MPC972FA Freescale Semiconductor, MPC972FA Datasheet - Page 9

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MPC972FA

Manufacturer Part Number
MPC972FA
Description
IC PLL CLOCK DRIVER 52-LQFP
Manufacturer
Freescale Semiconductor
Type
Clock Driver, Fanout Distribution, Multiplexerr
Datasheet

Specifications of MPC972FA

Pll
Yes with Bypass
Input
LVCMOS, LVTTL
Output
LVCMOS
Number Of Circuits
1
Ratio - Input:output
4:12
Differential - Input:output
No/No
Frequency - Max
125MHz
Divider/multiplier
Yes/No
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
52-LQFP
Frequency-max
125MHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Price
Part Number:
MPC972FA
Manufacturer:
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Using the On–Board Crystal Oscillator
for seed clock generation as well as final distribution. The
on–board oscillator is completely self contained so that the only
external component required is the crystal. As the oscillator is
somewhat sensitive to loading on its inputs the user is advised
to mount the crystal as close to the MPC972 as possible to
avoid any board level parasitics. To facilitate co–location
surface mount crystals are recommended, but not required.
to the more common parallel resonant circuit, this eliminates
the need for large on–board capacitors. Because the design is
a series resonant design for the optimum frequency accuracy
a series resonant crystal should be used (see specification
table below). Unfortunately most of the shelf crystals are
characterized in a parallel resonant mode. However a parallel
resonant crystal is physically no different than a series resonant
crystal, a parallel resonant crystal is simply a crystal which has
been characterized in its parallel resonant mode. Therefore in
the majority of cases a parallel specified crystal can be used
with the MPC972 with just a minor frequency error due to the
actual series resonant frequency of the parallel resonant
specified crystal. Typically a parallel specified crystal used in a
series resonant mode will exhibit an oscillatory frequency a few
hundred ppm lower than the specified value. For most
processor implementations a few hundred ppm translates into
kHz inaccuracies, a level which does not represent a major
issue.
* See accompanying text for series versus parallel resonant
generate outputs with programmable frequency relationships
and not a synthesizer with a fixed input frequency. As a result
the crystal input frequency is a function of the desired output
frequency. For a design which utilizes the external feedback to
the PLL the selection of the crystal frequency is straight
forward; simply chose a crystal which is equal in frequency to
the fed back signal.
3. Crystal Recommendations
Crystal Cut
Resonance
Frequency Tolerance
Frequency/Temperature Stability
Operating Range
Shunt Capacitance
Equivalent Series Resistance (ESR)
Correlation Drive Level
Aging
The MPC972 features an on–board crystal oscillator to allow
The oscillator circuit is a series resonant circuit as opposed
discussion.
The MPC972 is a clock driver which was designed to
MOTOROLA
Parameter
Fundamental AT Cut
Series Resonance*
±75 ppm at 25°C
±150 pm 0 to 70°C
0 to 70°C
5–7 pF
50 to 80 Ω Max
100 µW
5 ppm/Yr (First 3 Years)
Value
Recommended External Reset Timing
output clock to the input clock and if fselFB2 = 1, the assertion
of MR is recommended. The timing of asserting MR should be
as shown in 1. The power supply should be at or above the
minimum specified voltage and the reference clock input
(refclk) should be present a minimum of t1 prior to the reset
pulse being applied to the MR pin.
Power Supply Filtering
some sensitivities that would not necessarily be seen on a fully
digital product. Analog circuitry is naturally susceptible to
random noise, especially if this noise is seen on the power
supply pins. The MPC972 provides separate power supplies for
the output buffers (V
device. The purpose of this design technique is to try and isolate
the high switching noise digital outputs from the relatively
sensitive internal analog phase–locked loop. In a controlled
environment such as an evaluation board this level of isolation
is sufficient. However, in a digital system environment where it
is more difficult to minimize noise on the power supplies a
second level of isolation may be required. The simplest form of
isolation is a power supply filter on the V
MPC972.
MPC972 is most susceptible to noise with spectral content in
the 1 KHz to 1 MHz range. Therefore the filter should be
designed to target this range. The key parameter that needs to
be met in the final filter design is the DC voltage drop that will
be seen between the V
For MPC972 applications requiring synchronization of the
The MPC972 is a mixed analog/digital product and exhibits
Figure 10 illustrates a typical power supply filter scheme. The
Figure 10. Power Supply Filter
Figure 1. Assertion of MR
CCO
CC
) and the internal PLL (V
supply and the V
µ
µ
µ
CCA
CCA
MPC972
CCA
pin for the
pin of the
) of the
9

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