ISL12032IVZ-T Intersil, ISL12032IVZ-T Datasheet - Page 16

IC RTC LP BATT BACK SRAM 14TSSOP

ISL12032IVZ-T

Manufacturer Part Number
ISL12032IVZ-T
Description
IC RTC LP BATT BACK SRAM 14TSSOP
Manufacturer
Intersil
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of ISL12032IVZ-T

Memory Size
1K (128 x 8)
Time Format
HH:MM:SS:hh (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ISL12032IVZ-TTR

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
ISL12032IVZ-T
Manufacturer:
Intersil
Quantity:
11 856
Event Detection Register (EVIC)
EVENT OUTPUT IN BATTERY MODE ENABLE BIT
(EVBATB)
This bit enables/disables the EVDET pin during battery
backup mode (i.e. VBAT pin supply ON). When the EVBATB
is set to “1”, the Event Detect Output is disabled in battery
backup mode. When the EVBATB is cleared to “0”, the Event
Detect output is enabled in battery backup mode. This
feature can be used to save power during battery mode.
EVENT OUTPUT PULSE MODE (EVIM)
This bit controls the EVDET pin output mode. With EVIM = 0,
the output is in normal mode and when an event is triggered,
the output will be set LOW until reset. With EVIM = 1, the
output is in pulse mode and when an event is triggered, the
device will generate a 200ms to 300ms pulse at the EVDET
output.
EVENT DETECT ENABLE (EVEN)
This bit enables/disables the Event Detect function of the
ISL12032. When this bit is set to “1”, the Event Detect is
active. When this bit is cleared to “0”, the Event Detect is
disabled.
EVENT TIME-BASED HYSTERESIS (EHYS1, EHYS0)
These bits set the amount of time-based hysteresis that is
present at the EVIN pin for deglitching the input signal. The
settings vary from 0ms (hysteresis OFF) to 31.25ms (delay
of 31.25ms to check for change of state at the EVIN pin).
The Hysteresis function and the Event Input Sampling
function work independently.
EVENT INPUT SAMPLING RATE (ESMP)
These bits set the frequency of sampling of the Event Input
(EVIN). The settings include from 1/4Hz (one sample per 4s)
to 2Hz (twice a second), 1Hz, or continuous sampling
(Always ON). The less frequent the sampling, the lower the
current drain, which can affect battery current drain and
battery life.
ADDR
0Eh
EHSYS1
TABLE 9. EVENT DETECTION REGISTER (EVIC)
TABLE 10. EVENT TIME-BASED HYSTERESIS
0
0
1
1
X
7
EVBATB EVIM
6
5
EHSYS0
EVEN EHYS1 EHYS0 ESMP1 ESMP0
16
0
1
0
1
4
3
2
TIME (ms)
16.625
31.25
3.9
0
1
0
ISL12032
.
Event Index Register (EVIX)
The Event Index Register provides the index for locating an
individual event that has been stored. The Event recording
function allows recalling up to 4 events, although the Event
counting register will count up to 255 events. The 0th
location corresponds to the first event, and the 1st through
3rd locations correspond to the most recent events, with the
3rd location (11b) representing the latest event. Therefore,
setting EVIX to 03h location and reading the TSEVT section
will access the timestamp information for the most recent
(latest) event. Setting this register to another value will allow
reading the corresponding event from the TSEVT section.
EVENT BIT (EVIX <1:0>)
These bits are the Event Counter Register index bits. EVIX1
is the MSB and EVIX0 is the LSB.
Trickle Charge Register (TRICK)
The trickle charge function allows charging current to flow
from the V
current limiting resistor. Disabling the trickle charge function
removes this connection and isolates the battery from the
V
(as in the case with a lithium coin cell battery). Note that
there is no charging diode in series with the trickle charge
resistor, but a switch network that adds a small series
resistance to the charging resistance.
TRICKLE CHARGE BIT (TRKEN)
This bit enables/disables the trickle charge capability for the
backup battery supply. Setting this bit to “1” will enable the
trickle charge. Resetting this bit to “0” will disable the trickle
charge function and isolate the battery from the V
TRICKLE CHARGE RESISTOR (TRKRO<1:0>)
These bits allow the user to change the trickle charge
resistor settings according to the maximum current desired
for the battery or supercapacitor charging.
ADDR
ADDR
DD
10h
0Fh
supply in the case charging is not necessary or harmful
ESMP1
TABLE 13. TRICKLE CHARGE REGISTER (TRICK)
0
0
1
1
TABLE 12. EVENT INDEX REGISTER (EVIX)
TABLE 11. EVENT INPUT SAMPLING RATE
X
7
DD
7
X
supply to the VBAT pin through a selectable
X
6
6
X
X
5
ESMP2
X
5
0
1
0
1
4
X
4
X
X
3
TRKEN TRKRO1 TRKRO0
X
3
2
SAMPLING RATE
2
X
Always ON
1/4 Hz
2 Hz
1 Hz
EVIX1
1
1
DD
April 16, 2009
supply.
EVIX0
FN6618.2
0
0

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