LM9833CCVJD/NOPB National Semiconductor, LM9833CCVJD/NOPB Datasheet - Page 8

• Manufacturer Part Number: LM9833CCVJD/NOPB
• Description: IC USB IMAGE SCAN 48BIT 100-TOFP
• Manufacturer: National Semiconductor

Specifications of LM9833CCVJD/NOPB

• Number Of Bits: 16
• Number Of Channels: 3
• Voltage - Supply, Analog: 5V
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: *LM9833CCVJD; *LM9833CCVJD/NOPB; LM9833CCVJD

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional,
but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply
only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions.
Note 2: All voltages are measured with respect to GND=AGND=DGND=0V, unless otherwise specified.
Note 3: When the input voltage (V
maximum package input current rating limits the number of pins that can simultaneously safely exceed the power supplies with an input current of 25mA to two.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
able power dissipation at any temperature is P
is 53°C/W
Note 5: Human body model, 100pF capacitor discharged through a 1.5kΩ resistor. Machine model, 200pF capacitor discharged through a 0Ω resistor.
Note 6: See AN-450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any National Semiconductor Linear
Data Book for other methods of soldering surface mount devices.
Note 7: Two diodes clamp the OS analog inputs to
impedance of the sensor, prevents damage to the LM9833 from transients during power-up.
Note 8: For best performance, it is required that all supply pins be powered from the same power supply with separate bypass capacitors at each supply pin.
Note 9: Typicals are at T
Note 10: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 11: Integral linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that best fits the actual transfer function of the ADC.
Note 12: V
a white (full scale) image with respect to the reference level, V
correctable range of pixel-to-pixel V
LM9833 can correct for using its internal PGA.
Note 13:
Note 14: DNL, INL, and Power Supply Current are specified at the 80% Bias Current Setting (Register 9). This is the maximum recommended Bias Current setting, and
gives the best analog performance as well as lower power consumption for USB-bus powered applications.
Gain
AC Electrical Characteristics
The following specifications apply for AGND=DGND=0V, V
f
C
CRYSTAL IN
PGA
L
t
t
WR SETUP
t
Symbol
t
RD SETUP
WR HOLD
RD HOLD
(databus loading) = 20pF/pin. Boldface limits apply for T
.
 
 
V
--- -
V
REF
PGA Gain Error is the maximum difference between the measured gain for any PGA code and the ideal gain calculated by using the formula
=
is defined as the CCD OS voltage for the reference period following the reset feedthrough pulse. V
G
= 48MHz, MCLK DIVIDER = 1.0 (unless otherwise noted), f
0
+
X
Data valid to RD rising edge
Data valid after RD rising edge
Data valid before WR falling edge
Data valid after WR rising edge
PGA code
-------------------------- -
J
=T
32
A
=25°C, f
IN
where
WHITE
) at any pin exceeds the power supplies (V
CRYSTAL IN
Parameter
variation is defined as the maximum variation in V
X
=
D
= (T
(
= 48MHz, and represent most likely parametric norm.
G
31
AGND
J
max - T
–
G
0
)
and
32
----- -
31
A
REF
) / Θ
.
VA
OS Input
. V
JA
V
as shown below. This input protection, in combination with the external clamp capacitor and the output
RFT
. T
DRAM Timing (Figure 1)
RFT
J
max = 150°C for this device. The typical thermal resistance (Θ
is defined as the peak positive deviation above V
V
V
V
DRAM
DRAM
REF
CCD Output Signal
A
=V
IN
AGND
A
Conditions
<GND or V
=5.0V
=3.3V
VA
D
=T
8
=V
J
=T
V
DRAM
WHITE
MIN
MCLK
IN
To Internal
WHITE
=+5.0V
>V
Circuitry
to T
A
or V
= f
MAX
(due to PRNU, light source intensity variation, optics, etc.) that the
CRYSTAL IN
J
D
DC
max, Θ
; all other limits T
), the current at that pin should be limited to 25mA. The 50mA
unless otherwise noted,
(Note 9)
Typical
JA
WHITE
and the ambient temperature, T
/MCLK DIVIDER, f
is defined as the peak CCD pixel output voltage for
REF
of the reset feedthrough pulse. The maximum
A
=T
(Note 10)
J
Limits
=25°C. (Notes 8, 9, & 10)
JA
26
35
10
0
5
) of this part when board mounted
ADC CLK
A
. The maximum allow-
www.national.com
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
= f
Units
MCLK
/8,