LTC2418CGN#PBF Linear Technology, LTC2418CGN#PBF Datasheet - Page 15

• Manufacturer Part Number: LTC2418CGN#PBF
• Description: IC ADC 24BIT DIFF INPUT 28SSOP
• Manufacturer: Linear Technology

Specifications of LTC2418CGN#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-SSOP (0.150", 3.95mm Width)
• Number Of Elements: 1
• Resolution: 24Bit
• Architecture: Delta-Sigma
• Sample Rate: 0.008KSPS
• Input Polarity: Bipolar
• Input Type: Voltage
• Rated Input Volt: ±2.75V
• Differential Input: Yes
• Power Supply Requirement: Single
• Single Supply Voltage (typ): 3.3/5V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Integral Nonlinearity Error: 14ppm of Vref
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 28
• Package Type: SSOP N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
Table 2. Channel Selection for the LTC2418
* 0
*Default at power up
Output Data Format
The LTC2414/LTC2418 serial output data stream is 32 bits
long. The first 3 bits represent status information indicat-
ing the sign and conversion state. The next 23 bits are the
conversion result, MSB first. The next 5 bits (Bit 5 to Bit 1)
SGL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
MUX ADDRESS
ODD/
SIGN
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2 A1 A0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
U
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
U
IN
IN
IN
0
+
–
+
IN
IN
IN
1
–
+
+
W
IN
IN
IN
2
+
–
+
IN
IN
IN
3
–
+
+
U
IN
IN
IN
4
+
–
+
IN
IN
IN
5
–
+
+
IN
IN
IN
6
indicate which channel the conversion just performed was
selected. The address bits programmed during this data
output phase select the input channel for the next conver-
sion cycle. These address bits are output during the sub-
sequent data read, as shown in Figure 3b. The last bit is a
+
–
+
CHANNEL SELECTION
IN
IN
IN
7
–
+
+
IN
IN
IN
8
+
–
+
IN
IN
IN
9
–
+
+
LTC2414/LTC2418
IN
IN
IN
10
+
–
+
IN
IN
IN
11
–
+
+
IN
IN
IN
12
+
–
+
IN
IN
IN
13
–
+
+
IN
IN
IN
14
+
–
+
IN
IN
IN
15
–
+
+
15
241418fa
COM
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–