LTC2442IG#PBF Linear Technology, LTC2442IG#PBF Datasheet - Page 23

• Manufacturer Part Number: LTC2442IG#PBF
• Description: IC ADC 24BIT 4CH 36-SSOP
• Manufacturer: Linear Technology

Specifications of LTC2442IG#PBF

• Number Of Bits: 24
• Sampling Rate (per Second): 8k
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 50mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP (0.200", 5.30mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
If F
1.8MHz ±5% (over supply and temperature variations). At
an OSR of 32,768, the fi rst NULL is at f
no latency output rate is f
OSR, the noise performance of the device is 220nV
better than 80dB rejection of 50Hz ±2% and 60Hz ±2%.
Since the OSR is large (32,768) the wide band rejection
is extremely large and the antialiasing requirements are
simple. The fi rst multiple of f
1.8MHz, see Figure 12.
The fi rst NULL becomes f
(an output rate of 879Hz) and F
has shifted, the sample rate remains constant. As a result
of constant modulator sampling rate, the linearity, offset
and full-scale performance remains unchanged as does
the fi rst multiple of f
The sample rate f
driving the F
rate is f
O
Figure 12. Normal Mode Rejection (Internal Oscillator)
is grounded, f
S
= f
–100
–120
–140
–20
–40
–60
–80
O
EOSC
0
pin with an external oscillator. The sample
0
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
S
/5, where f
and NULL f
U
S
S
.
is set by the on-chip oscillator at
REJECTION > 120dB
N
U
N
= 7.03kHz with an OSR of 256
/8 = 6.9Hz. At the maximum
1000000
EOSC
S
O
N
occurs at 55Hz • 32,768 =
grounded. While the NULL
, may also be adjusted by
is the frequency of the
W
1.8MHz
N
= 55Hz and the
2442 F12
2000000
U
RMS
with
clock applied to F
sample rate leads to notch frequencies f
maintaining simple antialiasing requirements. A 100kHz
clock applied to F
harmonics up to 20kHz, see Figure 13. This is useful in
applications requiring digitalization of the DC component
of a noisy input signal and eliminates the need of placing
a 0.6Hz fi lter in front of the ADC.
An external oscillator operating from 100kHz to 20MHz can
be implemented using the LTC1799 (resistor set SOT-23
oscillator), see Figure 14. By fl oating pin 4 (DIV) of the
LTC1799, the output oscillator frequency is:
The normal mode rejection characteristic shown in
Figure 13 is achieved by applying the output of the LTC1799
(with R
= 32,768.
Figure 13. Normal Mode Rejection (Internal Oscillator at 90kHz)
f
OSC
SET
=
10
= 100k) to the F
–100
–120
–140
MHz
–20
–40
–60
–80
0
0
DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)
O
•
. Combining a large OSR with a reduced
O
⎛
⎝ ⎜
results in a NULL at 0.6Hz plus all
10
2
10
•
R
k
O
SET
4
pin on the LTC2442 with OSR
⎞
⎠ ⎟
6
8
LTC2442
N
2442 F13
near DC while
10
23
2442f