MAX1183ECM+TD Maxim Integrated Products, MAX1183ECM+TD Datasheet - Page 10

• Manufacturer Part Number: MAX1183ECM+TD
• Description: IC ADC 10BIT 40MSPS DL 48-TQFP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1183ECM+TD

• Number Of Bits: 10
• Sampling Rate (per Second): 40M
• Data Interface: Parallel
• Number Of Converters: 2
• Power Dissipation (max): 180mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFP Exposed Pad, 48-eTQFP, 48-HTQFP, 48-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The MAX1183 uses a nine-stage, fully differential,
pipelined architecture (Figure 1) that allows for high-
speed conversion while minimizing power consump-
tion. Samples taken at the inputs move progressively
through the pipeline stages every half-clock cycle.
Including the delay through the output latch, the total
clock-cycle latency is five clock cycles.
One-and-a-half bit (2-comparator) flash ADCs convert
the held-input voltages into a digital code. The digital-
Dual 10-Bit, 40Msps, 3V, Low-Power ADC with
Internal Reference and Parallel Outputs
Figure 1. Pipelined Architecture—Stage Blocks
10
V
PIN
IN
41
42
43
44
45
46
47
48
______________________________________________________________________________________
—
V
INA
T/H
FLASH
ADC
REFOUT
1.5 BITS
NAME
REFIN
REFP
REFN
STAGE 1
D6A
D7A
D8A
D9A
T/H
EP
DAC
Detailed Description
DIGITAL CORRECTION LOGIC
Three-State Digital Output, Bit 6, Channel A
Three-State Digital Output, Bit 7, Channel A
Three-State Digital Output, Bit 8, Channel A
Three-State Digital Output, Bit 9 (MSB), Channel A
Internal Reference Voltage Output. May be connected to REFIN through a resistor or a resistor
divider.
Reference Input. V
Positive Reference Input/Output. Conversion range is ± (V
Bypass to GND with a > 0.1µF capacitor.
Negative Reference Input/Output. Conversion range is ± (V
Bypass to GND with a > 0.1µF capacitor.
Exposed Pad. Connect to analog ground.
Σ
V
V
D9A–D0A
STAGE 2
INA
INB
= INPUT VOLTAGE BETWEEN INA+ AND INA- (DIFFERENTIAL OR SINGLE ENDED)
= INPUT VOLTAGE BETWEEN INB+ AND INB- (DIFFERENTIAL OR SINGLE ENDED)
10
x2
V
OUT
STAGE 8
REFIN
= 2 x (V
2-BIT FLASH
STAGE 9
ADC
REFP
- V
V
IN
to-analog converters (DACs) convert the digitized
results back into analog voltages, which are then sub-
tracted from the original held-input signals. The resulting
error signals are then multiplied by two, and the residues
are passed along to the next pipeline stages where the
process is repeated until the signals have been
processed by all nine stages. Digital error correction
compensates for ADC comparator offsets in each of
these pipeline stages and ensures no missing codes.
REFN
V
INB
FUNCTION
). Bypass to GND with a >1nF capacitor.
T/H
FLASH
ADC
1.5 BITS
STAGE 1
T/H
Pin Description (continued)
DAC
REFP
REFP
DIGITAL CORRECTION LOGIC
- V
- V
Σ
D9B–D0B
REFN
STAGE 2
REFN
10
).
).
x2
V
OUT
STAGE 8
2-BIT FLASH
STAGE 9
ADC