MAX1301BEUP+ Maxim Integrated Products, MAX1301BEUP+ Datasheet - Page 14

• Manufacturer Part Number: MAX1301BEUP+
• Description: IC ADC 16BIT SER 4CH LP 20TSSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX1301BEUP+

• Number Of Bits: 16
• Sampling Rate (per Second): 115k
• Data Interface: MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 105.5mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8- and 4-Channel, ±3 x V
Serial 16-Bit ADCs
To maintain a low-noise environment, the MAX1300 and
MAX1301 provide separate power supplies for each
section of circuitry. Table 1 shows the four separate
power supplies. Achieve optimal performance using
separate AV
Alternatively, connect AV
together as close to the device as possible for a conve-
nient power connection. Connect AGND1, AGND2,
AGND3, DGND, and DGNDO together as close to the
device as possible. Bypass each supply to the corre-
sponding ground using a 0.1μF capacitor (Table 1). If
significant low-frequency noise is present, add a 10μF
capacitor in parallel with the 0.1μF bypass capacitor.
The MAX1300/MAX1301 ADCs feature a fully differen-
tial, successive-approximation register (SAR) conver-
sion technique and an on-chip T/H block to convert
voltage signals into a 16-bit digital result. Both single-
ended and differential configurations are supported
with programmable unipolar and bipolar signal ranges.
Table 1. MAX1300/MAX1301 Power Supplies and Bypassing
Table 2. Analog Input Configuration Byte
14
NUMBER
SUPPLY/GROUND
DV
AV
AV
BIT
______________________________________________________________________________________
DV
7
6
5
4
3
2
1
0
DDO
DD2
DD1
POWER
DD
/DGNDO
/AGND2
/AGND1
/DGND
DD1
DIF/SGL
START
NAME
C2
C1
C0
R2
R1
R0
, AV
DD2
SUPPLY VOLTAGE
Start Bit. The first logic 1 after CS goes low defines the beginning of the analog input configuration byte.
Channel-Select Bits. SEL[2:0] select the analog input channel to be configured (Tables 4 and 5).
Differential or Single-Ended Configuration Bit. DIF/SGL = 0 configures the selected analog input channel
for single-ended operation. DIF/SGL = 1 configures the channel for differential operation. In single-ended
mode, input voltages are measured between the selected input channel and AGND1, as shown in
Table 4. In differential mode, the input voltages are measured between two input channels, as shown in
Table 5. Be aware that changing DIF/SGL adjusts the FSR, as shown in Table 6.
Input-Range-Select Bits. R[2:0] select the input voltage range, as shown in Table 6 and Figure 7.
, DV
4.75 to 5.25
4.75 to 5.25
4.75 to 5.25
RANGE (V)
2.7 to 5.25
DD1
DD
Converter Operation
, and DV
, AV
Power Supplies
DD2
DDO
, and DV
TYPICAL SUPPLY
CURRENT (mA)
supplies.
0.03
135
3.0
0.8
DD
REF
The MAX1300/MAX1301 feature a switched-capacitor
T/H architecture that allows the analog input signal to be
stored as charge on sampling capacitors. See Figures 2,
3, and 4 for T/H timing and the sampling instants for
each operating mode. The MAX1300/MAX1301 analog
input circuitry buffers the input signal from the sampling
capacitors, resulting in a constant input impedance with
varying input voltage (Figure 5).
Select differential or single-ended conversions using the
associated analog input configuration byte (Table 2).
The analog input signal source must be capable of dri-
ving the ADC’s 17kΩ input resistance (Figure 6).
Figure 6 shows the simplified analog input circuit. The
analog inputs are ±16.5V fault tolerant and are protected
by back-to-back diodes. The summing junction voltage,
V
mode voltage:
As a result, the analog input impedance is relatively con-
stant over input voltage as shown in Figure 5.
V
SJ
SJ
Digital I/O
Analog Circuitry
Analog Circuitry
Digital Control Logic and Memory
DESCRIPTION
, is a function of the channel’s input common-
=
⎛
⎜
⎝
Multirange Inputs,
R
CIRCUIT SECTION
1
R
+
1
R
2
⎞
⎟ ×
⎠
2 375
.
Track-and-Hold Circuitry
V
Analog Input Circuitry
+
⎛
⎜
⎝
1
+
⎛
⎜
⎝
0.1μF to DGNDO
0.1μF to AGND2
0.1μF to AGND1
0.1μF to DGND
R
1
R
+
BYPASSING
1
R
2
⎞
⎟
⎠
⎞
⎟ ×
⎠
V
CM