CS5102A-JLZ Cirrus Logic Inc, CS5102A-JLZ Datasheet - Page 31

• Manufacturer Part Number: CS5102A-JLZ
• Description: IC ADC 16BIT 100/20KHZ 28-PLCC
• Manufacturer: Cirrus Logic Inc

Specifications of CS5102A-JLZ

• Number Of Bits: 16
• Sampling Rate (per Second): 20k
• Data Interface: Serial
• Number Of Converters: 1
• Power Dissipation (max): 65mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 28-PLCC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1080-5

7.4
An A/D converter's noise can be described like that
of any other analog component. However, the con-
verter's output is in digital form so any filtering of its
noise must be performed in the digital domain. Dig-
itized samples of analog inputs are often consid-
ered individual, static snap-shots in time with no
uncertainty or noise. In reality, the result of each
conversion depends on the analog input level and
the instantaneous value of noise sources in the
ADC. If sequential samples from the ADC are
treated as a “waveform”, simple filtering can be im-
plemented in software to improve noise perfor-
mance with minimal processing overhead.
All analog circuitry in the CS5101A and CS5102A
is wideband in order to achieve fast conversions
and high throughput. Wideband noise in the
CS5101A and CS5102A integrates to 35 µV rms in
unipolar mode (70 µV rms in bipolar mode). This is
approximately 1/2 LSB rms with a 4.5V reference
in both modes. Figure 23 shows a histogram plot of
output code occurrences obtained from 8192 sam-
ples taken from a CS5101A in the bipolar mode.
Hexadecimal code 7FFE was arbitrarily selected
and the analog input was set close to code center.
With a noiseless converter, code 7FFE would al-
ways appear. The histogram plot of the device has
a “bell” shape with all codes other than 7FFE due
to internal noise. Figure 24 illustrates the noise his-
togram of the CS5102A.
DS45F6
Figure 23. CS5101A Histogram Plot of 8192
81 92
61 44
40 96
20 48
C ou nts :
Noise
C ou nt
7F F B
0
Conversion Inputs
7F F C
0
7F F D
989
C od e (H e xa de cim al)
7F F E
63 59
7F F F
844
8000
0
N o ise les s
C on verte r
C S 510 1 A
8001
0
In a sampled data system all information about the
analog input applied to the sample/hold appears in
the baseband from DC to one-half the sampling
rate. This includes high-frequency components
which alias into the baseband. Low-pass (anti-
alias) filters are therefore used to remove frequen-
cy components in the input signal which are above
one-half the sample rate. However, all wideband
noise introduced by the CS5101A and CS5102A
still aliases into the baseband. This “white” noise is
evenly spread from DC to one-half the sampling
rate and integrates to 35 µV rms in unipolar mode.
Noise in the digital domain can be reduced by sam-
pling at higher than the desired word rate and av-
eraging
Oversampling spreads the device's noise over a
wider band (for lower noise density), and averag-
ing applies a low-pass response which filters noise
above the desired signal bandwidth. In general, the
device's noise performance can be maximized in
any application by always sampling at the maxi-
mum specified rate of 100 kSps (CS5101A) or
20 kSps (CS5102A) (for lowest noise density) and
digitally filtering to the desired signal bandwidth.
7.5
Track-and-hold amplifiers commonly exhibit two
types of aperture jitter. The first, more appropriate-
ly termed “aperture window”, is an input-voltage-
dependent variation in the aperture delay. Its sig-
nal dependency causes distortion at high frequen-
Figure 24. CS5102A Histogram Plot of 8192
8 19 2
6 14 4
4 09 6
2 04 8
C o unts:
Aperture Jitter
C o unt
7F F D
multiple
0
7 FF E
5
Conversion Inputs
7 FF F 8 00 0 (H )
1 72 7
C od e (H e xa de cim a l)
CS5101A CS5102A
samples
4 98 8
8 00 1
1 46 7
for
8 00 2
5
each
N o is ele ss
C on ve rter
C S 5 1 0 2 A
8 00 3
0
word.
31