CY8C5387AXI-108 Cypress Semiconductor Corp, CY8C5387AXI-108 Datasheet - Page 65

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CY8C5387AXI-108

Manufacturer Part Number
CY8C5387AXI-108
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5387AXI-108

Lead Free Status / Rohs Status
Compliant
11.4.3 USBIO
For operation in USB mode, Vddd range condition is 3.15 V ≤ Vddd ≤ 3.45 V (USB regulator bypassed) or 4.35 V ≤ Vddd ≤ 5.25 V
(USB regulator in use). For operation in GPIO mode, the standard range for Vddd applies, see
Table 11-12. USBIO DC Specifications
Table 11-13. USBIO AC Specifications
Document Number: 001-55035 Rev. *F
Rusbi
Rusba
Vohusb
Volusb
Vohgpio
Volgpio
Vdi
Vcm
Vse
Rps2
Rext
Zo
Cin
Iil
Tdrate
Tjr1
Tjr2
Tdj1
Tdj2
Tfdeop
Tfeopt
Tfeopr
Tfst
Fgpio_out
Tr_gpio
Tf_gpio
Parameter
Parameter
Full-speed data rate average bit rate
Receiver data jitter tolerance to next
transition
Receiver data jitter tolerance to pair
transition
Driver differential jitter to next transition
Driver differential jitter to pair transition
Source jitter for differential transition to
SE0 transition
Source SE0 interval of EOP
Receiver SE0 interval of EOP
Width of SE0 interval during differential
transition
GPIO mode output operating frequency 3 V ≤ Vddd ≤ 5.5 V
Rise time, GPIO mode, 10%/90% Vddd Vddd > 3 V, 25 pF load
Fall time, GPIO mode, 90%/10% Vddd Vddd > 3 V, 25 pF load
USB D+ pull up resistance
USB D+ pull up resistance
Static output high
Static output low
Output voltage high, GPIO mode
Output voltage low, GPIO mode
Differential input sensitivity
Differential input common mode range
Single ended receiver threshold
PS/2 pull up resistance
External USB series resistor
USB driver output impedance
USB transceiver input capacitance
Input leakage current (absolute value) 25°C, Vddd = 3.0 V
Description
Description
PRELIMINARY
With idle bus
While receiving traffic
15 k Ω ±5% to Vss, internal pull up
enabled
15 k Ω ±5% to Vss, internal pull up
enabled
Ioh = 4 mA, Vddd ≥ 3 V
Iol = 4 mA, Vddd ≥ 3 V
|(D+)-(D-)|
In PS/2 mode, with PS/2 pull up
enabled
In series with each USB pin
Including Rext
Vddd = 1.71 V
Vddd = 1.71 V, 25 pF load
Vddd = 1.71 V, 25 pF load
Conditions
Conditions
PSoC
®
5: CY8C53 Family Data Sheet
12 - 0.25%
0.900
1.425
21.78
(-1%)
Device Level Specifications
Min
2.8
2.4
0.8
0.8
Min
-3.5
28
160
3
82
-8
-5
-4
-2
-
-
-
-
-
1
4
1
4
-
-
-
Typ
Typ
22
12
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(+1%)
1.575
3.090
22.22
0.25%
Max
2.5
Max
12 +
3.6
0.3
0.3
0.2
44
175
20
3.5
2
7
2
14
20
12
40
12
40
-
4
6
8
5
5
-
on page 59.
Page 65 of 97
Units
Units
MHz
MHz
k Ω
k Ω
nA
MHz
pF
k Ω
V
V
V
V
V
V
V
Ω
Ω
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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