PEB20570FV31XP Lantiq, PEB20570FV31XP Datasheet - Page 235

• Manufacturer Part Number: PEB20570FV31XP
• Manufacturer: Lantiq

Specifications of PEB20570FV31XP

• Lead Free Status / Rohs Status: Compliant

6.2.8
6.2.8.1
MCFG Register
D148
Reset value: 00
DMA
FB
PEC
IACK
IMASK
IRQMO
Data Sheet
H
DRQLV
15
7
x
µP Configuration Registers
µP Interface Configuration Register
DMA Mode Enabled
0 =
1 =
Fly-by Mode
0 =
1 =
PEC Transfers Enable
0 =
1 =
Interrupt Acknowledge Mode
0 =
1 =
Interrupt Mask
0 =
1 =
IREQ Pin Mode
0 =
H
IRQLV
14
6
x
No DMA
DMA enabled
Memory-to-memory mode used for DMA transfers
Fly-by mode used for DMA transfers
No PEC Transfers
PEC transfers are supported (for connection of C16x µP)
Interrupt vector is provided to CPU after 1st IACK pulse.
Interrupt vector is provided to CPU after 2nd IACK pulse.
IREQ pin is disabled
IREQ pin is enabled
Open-drain mode
IRQMO
13
5
x
IMASK
12
4
DSP: read
µP: read/write
x
218
IACK
11
3
x
PEC
10
2
x
Register Description
DSP Address:
µP high address: none
µP low address:
FB
9
x
1
PEB 20570
PEB 20571
2003-07-31
MODE
DMA
8
0
48
H