TS68EN360MAB/Q33L E2V, TS68EN360MAB/Q33L Datasheet - Page 7

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TS68EN360MAB/Q33L

Manufacturer Part Number
TS68EN360MAB/Q33L
Description
Manufacturer
E2V
Datasheet

Specifications of TS68EN360MAB/Q33L

Operating Temperature (max)
125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
Table 1. System Bus Signal Index (Normal Operation) (Continued)
e2v semiconductors SAS 2008
Bus Control
Interrupt
Control
System
Control
Group
Signal Name
Data and Size
Acknowledge
Address Strobe
Data Strobe
Size
Read/Write
Output Enable Address
Multiplex
Interrupt Request
Level 7-1
Autovector/Interrupt
Acknowledge 5
Soft Reset
Hard Reset
Halt
Bus Error
DSACK1 - DSACK0
AVEC/IACK5
Mnemonic
IRQ7-IRQ1
SIZ1-SIZ0
OE/AMUX
RESETS
RESETH
BERR
HALT
R/W
AS
DS
Function
Provides asynchronous data transfer acknowledgement and
dynamic bus sizing (open-drain I/O but driven high before
three-stated)
Indicates that a valid address is on the address bus. (I/O)
During a read cycle, DS indicates that an external device
should place valid data on the data bus. During a write cycle,
DS indicates that valid data is on the data bus. (I/O)
Indicates the number of bytes remaining to be transferred for
this cycle. (I/O)
Indicates the direction of data transfer on the bus. (I/O)
Active during a read cycle indicates that an external device
should place valid data on the data bus (O) or provides a
strobe for external address multiplexing in DRAM accesses if
internal multiplexing is not used. (O)
Provides external interrupt requests to the CPU32+ at priority
levels 7-1. (I)
Autovector request during an interrupt acknowledge cycle
(open-drain I/O) or interrupt level 5 acknowledge line. (O)
Soft system reset. (open-drain I/O)
Hard system reset. (open-drain I/O)
Suspends external bus activity. (open-drain I/O)
Indicates an erroneous bus operation is being attempted.
(open-drain I/O)
0886C–HIREL–04/08
TS68EN360
7

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