TS68EN360MAB/Q33L E2V, TS68EN360MAB/Q33L Datasheet - Page 76

• Manufacturer Part Number: TS68EN360MAB/Q33L
• Manufacturer: E2V

Specifications of TS68EN360MAB/Q33L

• Operating Temperature (max): 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

8.5.3
9. Preparation for Delivery
9.1
9.2
10. Handling
76
Packaging
Certificate of Compliance
0886C–HIREL–04/08
Software Compatibility Issues
The following list summarizes the major software differences between the TS68302 and the QUICC:
Microcircuits are prepared for delivery in accordance with MIL-PRF-38535 or e2v standards.
e2v offers a certificate of compliances with each shipment of parts, affirming the products are in compli-
ance either with MIL-STD-883 or e2v standard and guarantying the parameters not tested at
temperature extremes for the entire temperature range.
MOS devices must be handled with certain precautions to avoid damage due to accumulation of static
charge. Input protection devices have been designed in the chip to minimize the effect of this static
buildup. However, the following handling practices are recommended:
a) Devices should be handled on benches with conductive and grounded surfaces
b) Ground test equipment, tools and operator
c) Do not handle devices by the leads
d) Store devices in conductive foam or carriers
e) Avoid use of plastic, rubber, or silk in MOS areas
f) Maintain relative humidity above 50% if practical
• Since the CPU32+ is a superset of the 68000 instruction set, all previously written code will run.
• The QUICC contains an 8-Kbyte block of memory as opposed to a 4-Kbyte block on the TS68302.
• The code used to initialize the system integration features of the TS68302 has to be modified to write
• As much as possible, QUICC CPM features were made identical to those of the TS68302 CP. The
• Although the registers used to initialize the QUICC CPM are new (for example, the SCM on the
• When porting code from the TS68302 CP to the QUICC CPM, the software writer may find that the
However, if such code is accessing the TS68302 peripherals, it will require some modification
The register addresses within that memory map are different
the corresponding features on the QUICC SIM60
most important benefit is that the code flow (if not the code itself) will port easily from the TS68302 to
the QUICC. The nuances learned from the TS68302 will still be useful in the QUICC
TS68302 is replaced with the GSMR and PSMR on the QUICC), most registers retain their original
purpose such as the SCC event, SCC mask, SCC status, and command registers. The parameter
RAM of the SCCs is very similar, and most parameter RAM register names and usage are retained.
More importantly, the basic structure of a buffer descriptor (BD) on the QUICC is identical to that of
the TS68302, except for a few new bit functions that were added. (In a few cases, a bit in a BD status
word had to be shifted)
QUICC has new options to simplify what used to be a more code-intensive process. For specific
examples, see the INIT TX AND RX PARAMETERS, GRACEFUL STOP TRANSMIT, and CLOSE BD
commands
e2v semiconductors SAS 2008
TS68EN360