PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 404
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
Table 20: QVCP 1 Registers
PNX17XX_SER_1
Preliminary data sheet
Bit
27:16
15:12
11:0
Control and Interrupt Registers
Offset 0x10 E014
31:28
27:16
15:12
11:0
Offset 0x10 E018
31:30
29:27
26:24
23:21
20:18
17:15
14:12
11:9
8:6
5:3
2:0
Offset 0x10 E01C
31:24
23:16
15:8
7:0
Symbol
VSYNCS
Unused
VSYNCE
Unused
VLINTA
Unused
VLINTB
NOOUT
Unused
NOGNSH
NOPLAN
NOLSHR
NOHSRU
NOHIST
NOCTI
NOCFTR
NOCLUTS
NOLAYERS
Unused
Upper
Middle
Lower
VINTERRUPT
FEATURES
DEFAULT BACKGROUND COLOR
…Continued
Acces
s
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
0
-
0
-
0
-
0
0x1
-
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x1
0x2
-
0
0
0
Value
Rev. 1 — 17 March 2006
Description
Vertical Sync Start sets pixel location where Vertical sync starts.
Limitation: VTOTAL+1 >= VSYNCS >=1.
Vertical Sync End sets pixel location where Vertical sync ends.
Limitation: VTOTAL >= VSYNCE >=0.
Vertical Line Interrupt A sets a vertical line number where an
interrupt will be generated when the scan line matches this value.
The interrupt is monitored by the Event Monitor (EVM).
Limitation: VTOTAL >= VLINTA >=0.
Vertical Line Interrupt B sets a vertical line number where an
interrupt will be generated when the scan line matches this value.
The interrupt is monitored by the Event Monitor (EVM).
Limitation: VTOTAL >= VLINTB >=0.
Background color of the upper channel (R/Y) (two's complement)
Background color of the middle channel (G/U) (two's complement)
Background color of the lower channel (B/V) (two's complement)
Number of Output channels
Number of GNSHs
Number of PLANs (semi planar channels)
Number of LSHRs
Number of HSRUs
Number of HISTs
Number of CTIs
Number of CFTRs
Number of CLUTs
Number of layers
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
Chapter 11: QVCP
11-47
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