PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 439
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
Table 4: Relationship Between Input Formats and Video Data Capture
PNX17XX_SER_1
Preliminary data sheet
Input Modes
D1
VMI
HD
Figure 7:
Test Pattern Generator
Video Input
Video Data Flow
UYVY(8/10)
UYVY(8)
or UV(8/10)
2.5.1 Video Data Flow
2.5.2 Video Data Acquisition
2.5 Video Data Path
8-bit
10-bit
8-bit
8-bit
10-bit
Y(8/10)
Down_sample
The relation between the video input formats and the supported data stream is shown
in
The video datapath dataflow for the VIP is shown in
The Video and Auxiliary Data Extract block, shown in
pixel stream from the Video Timing Control block and outputs active window data and
synchronization signals. Bit fields in the windowing registers specify the start and end
of the source windows relative to the reference edges of H and V syncs and size of
the target windows.
Chroma
Table
Video Timing
Control and
Video
Extraction
4.
Single Stream (YUV) Video Data
X
X
X
U or UV or G
Y
V
(8)
(8)
(8)
(8/10)
(8/10)
UV
Y
or R
or B
Rev. 1 — 17 March 2006
-Ordered dither
or Rounding
(10->8)
propagation
(10->9)
(8->3,4,5,6)
Dither
(9->8)
Dither
-Error
(8)
(8)
UV
U or UV or G
V
Y
(8)
Y
(8)
(8)
Up_sample
( 8/5/4)
(8/6/5/4)
(8/5/4/3)
Chroma
or R
or B
Dual Stream (Y and U/V) Video Data
X
X
Chapter 12: Video Input Processor
(8)
U
(8)
(8)
Y
V
Packing
Pixel
See Table 10.
Figure
Figure
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Color Space
Horizontal
Filtering or
Conversion
PNX17xx Series
7.
(64)
(64)
(64)
1, receives a continuous
DMA2
DMA3
DMA1
U or G
Y or R
V or B
(8)
(8)
(8)
12-8
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