PNX1701EH,557 NXP Semiconductors, PNX1701EH,557 Datasheet - Page 642
PNX1701EH,557
Manufacturer Part Number
PNX1701EH,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1701EH557.pdf
(832 pages)
Specifications of PNX1701EH,557
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
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Philips Semiconductors
Volume 1 of 1
Table 20: Blt Control
PNX17XX_SER_1
Preliminary data sheet
Bit
Offset 0x04 F428
31:27
26:24
23:20
19
18:16
Symbol
Reserved
BD[2:0]
A[3:0]
Reserved
CC[2:0]
Blt Control
Acces
s
R/W
R/W
R/W
Value
0
0
0
Rev. 1 — 17 March 2006
Description
The BD[2:0] field specifies the bitblt direction. BD[0] specifies the
horizontal BLT direction. It is bit 24 of this register:
0 = Blt direction is left to right.
1 = Blt direction is right to left.
BD[1] specifies the vertical BLT direction. It is bit 25 of this register:
0 = Blt direction is top to bottom.
1 = Blt direction is bottom to top.
BD[2] enables vertical flipping during the BLT by allowing the source
data to be read in the opposite vertical direction from the destination
data. Bd[2] is bit 26 of this register:
0 = Src is read as specified in BD[1.]
1 = Src is read in reverse of BD[1].
The A[3:0] field controls alpha-blending operations and is in bits
23:20 of this register. A[1:0] controls enabling of alpha-blending and
the format of the source data. The valid values are:
0 = Alpha-blending is disabled.
1 = Src data contains normal alpha data.
2 = Src data contains pre-multiplied alpha data.
3 = Src data does not have alpha data, surface alpha is the only
alpha value.
Bit 2 of this field controls the updating of the alpha field in the
destination:
0 = Preserve destination alpha field.
1 = Update destination alpha field.
Bit 3 of this field controls whether destination data participates in the
alpha blend operation. It is used to implement “unary” blends:
0 = Blend source with destination data
1 = Blend source with black
IN RGB mode, “black” means RGB = (0, 0, 0). In YUV mode, “black”
means YUV = (16, 128, 128).
The CC[2:0] specifies the operation of the color compare hardware.
CC[2:0] are bits 19:16 of this register. Legal values are:
0 = Color compare disabled.
1 = SRC data is used for color compare, perform write operation
if colors match.
2 = DST data is used for color compare, perform write operation
if colors match.
3 = Reserved
4 = Reserved
5 = SRC data is used for color compare, perform write operation
if colors don’t match.
6 = DST data is used for color compare, perform write operation
if colors don’t match.
7 = Reserved
Chapter 20: 2D Drawing Engine
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX17xx Series
20-22
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