MT46H32M16LFCK-10 Micron Technology Inc, MT46H32M16LFCK-10 Datasheet - Page 68

• Manufacturer Part Number: MT46H32M16LFCK-10
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H32M16LFCK-10

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 7ns
• Maximum Clock Rate: 104MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 37:
PDF: 09005aef818ff7c5/Source: 09005aef81a6c5f3
MT46H32M16LF_2..fm - Rev. F 09/05 EN
DQ0–DQ7 and LDQS, collectively
DQ (First data no longer valid)
DQ (First data no longer valid)
DQM0/DQM1/DQM2/DQM3
DQ (Last data valid)
DQ (Last data valid)
Data Output Timing –
Notes: 1. DQ transitioning after DQS transition define
CK#
DQ
DQ
DQ
DQ
DQ
DQ
CK
5
2. Byte 0 is DQ0...7, Byte 1 is DQ8...15, Byte 2 is DQ16...23, Byte 3 is DQ24...31.
3.
4.
5. The data valid window is derived for each DQS transition and is
T1
and UDQS defines the upper byte.
t
DQS transition and ends with the last valid DQ transition.
t
t
DQSQ is derived at each DQS clock edge and is not cumulative over time and begins with
QH is derived from
HP is the lesser of
t
HP
5
t
DQSQ,
t
HP
t
5
DQSQ
T2
t
Data Valid
t
QH, and Data Valid Window (x32)
CL or
window
3
t
HP:
T2
T2
T2
t
HP
t
5
t
QH =
CH clock transition collectively when a bank is active.
68
T2n
t
DQSQ
t
QH
Data Valid
4
t
window
HP -
3
t
T2n
T2n
T2n
HP
5
t
QHS.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
512Mb: x16, x32 Mobile DDR SDRAM
t
DQSQ
t
QH
4
t
Data Valid
HP
3
window
t
5
DQSQ window. LDQS defines the lower byte
T3
T3
T3
T3n
t
DQSQ
t
t
HP
QH
5
4
Data Valid
3
window
T4
T3n
T3n
T3n
©2005 Micron Technology, Inc. All rights reserved.
t
QH -
Timing Diagrams
t
DQSQ.
Advance