IS43LR32160B-6BLI ISSI, Integrated Silicon Solution Inc, IS43LR32160B-6BLI Datasheet - Page 23

• Manufacturer Part Number: IS43LR32160B-6BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS43LR32160B-6BLI

• Lead Free Status / Rohs Status: Compliant

Rev.00B | Dec. 2010
Table15 : DC Characteristic (DC operating conditions unless otherwise noted)
Operating one bank active-
precharge current
Precharge power-down standby
current
Precharge power-down standby
current with clock stop
Precharge non power-down
standby current
Precharge non power-down
standby current with clock stop
Active power-down standby
current
Active power-down standby
current with clock stop
Active non power-down
standby current
Active non power-down
standby current with clock
stop
Operating burst read current
Operating burst write current
Auto Refresh Current
Self
Refresh
Current
Standby Current in
Deep Power Down Mode
Note :
Parameter
2. Refresh period is 64ms, applicable for T
3. All values applicable for operation with T
4. For A2 temperature grade with T
IDD2N, IDD2NS, IDD3N, IDD3NS, IDD5 are deregulated to 25% above the values; IDD8 is not tested.
2 Banks
4 banks
1. Measured with outputs open.
1 Bank
PASR
TCSR
40°C
85°C
40°C
40°C
85°C
85°C
Symbol
IDD2NS
IDD3NS
IDD2PS
IDD3PS
IDD4W
IDD2N
IDD3N
IDD2P
IDD3P
IDD4R
IDD0
IDD5
IDD6
IDD8
All banks idle, CKE is LOW, /CS is HIGH, tCK =
tCK(min), address and control inputs are
One bank active, CKE is LOW, /CS is HIGH, tCK =
tCK(min), address and control inputs are
SWITCHING, data bus inputs are STABLE
One bank active, CKE is LOW, /CS is HIGH, CK =
LOW, /CK = HIGH, address and control inputs are
tRC=tRFC(min), tCK=tCK(min), burst refresh,
Address and control inputs are STABLE, data bus
inputs are STABLE
tRC = tRC(min), tCK = tCK(min), CKE is HIGH, /CS
is HIGH between valid commands, address inputs
are SWITCHING, data bus inputs are STABLE
SWITCHING, data bus inputs are STABLE
All banks idle, CKE is LOW, /CS is HIGH, CK = LOW,
/CK = HIGH, address and control inputs are
SWITCHING, data bus inputs are STABLE
All banks idle, CKE is HIGH, /CS is HIGH, tCK =
tCK(min)
SWITCHING, data bus inputs are STABLE
All banks idle, CKE is HIGH, /CS is HIGH, CK = LOW,
/CK = HIGH, address and control inputs are
SWITCHING, data bus inputs are STABLE
SWITCHING, data bus inputs are STABLE
One bank active, CKE is HIGH, /CS is HIGH, tCK =
tCK(min), address and control inputs are
SWITCHING, data bus inputs are STABLE
One bank active, CKE is HIGH, /CS is HIGH, CK =
LOW, /CK = HIGH, address and control inputs are
SWITCHING, data bus inputs are STABLE
One bank active, BL=4, CL=3, tCK = tCK(min),
continuous read bursts, IOUT=0mA,
address inputs are SWITCHING, 50% data change
each burst transfer
One bank active, BL=4, tCK=tCK(min), continuous
write bursts, address inputs are SWITCHING, 50%
data change each burst transfer
CKE is HIGH, address and control inputs are
SWITCHING, data bus inputs are STABLE
CKE is LOW
CK=LOW, /CK=HIGH
tCK=tCK(min)
Extended Mode Register set to all 0's, address and
control inputs are STABLE, data bus inputs are
STABLE
A
> 85°C: IDD2P, IDD2PS, IDD3PS are deregulated to 2x these values;
A
www.issi.com
A
≤ 85°C.
,
≤ 85°C.
address and control inputs are
Test Condition
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IS43LR32160B, IS46LR32160B
(3, 4)
-60
130
130
70
Speed
700
490
460
350
340
280
0.4
0.4
0.5
0.5
22
18
90
10
5
2
-75
110
110
65
Advanced Information
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
uA
uA
Note
1
1
1
2
23