IS43LR32160B-6BLI ISSI, Integrated Silicon Solution Inc, IS43LR32160B-6BLI Datasheet - Page 37

• Manufacturer Part Number: IS43LR32160B-6BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS43LR32160B-6BLI

• Lead Free Status / Rohs Status: Compliant

Rev.00B | Dec. 2010
Precharge
for subsequent row access some specified time (tRP) after the Precharge command issued.
Input A10 determines whether one or all banks are to be precharged. In the case where only one bank is to be precharged (A10=Low),
inputs BA0,BA1 select the banks.
When all banks are to be precharged (A10=High), inputs BA0,BA1 are treated as a “Don’t Care”. Once a bank has been precharged, it is in
the idle state and must be actived prior to any Read or Write commands being issued to that bank.
Mode Register
The mode register contains the specific mode of operation of the Mobile DDR SDRAM. This register includes the selection of a burst length
( 2, 4, 8, 16), a cas latency(2, 3), a burst type. The mode register set must be done before any activate command after the power up
sequence.
Any contents of the mode register be altered by re-programming the mode register through the execution of mode register set command.
Figure32 : Mode Resister Set
Figure31 : Precharge command
The Precharge command is used to deactivate the open row in a particular bank or the open row in all banks. The banks will be available
CMD
/CLK
CLK
0
t
CK
Precharge
All Bank
1
t
RP
BA 0, BA 1
2
/RAS
/CAS
/CLK
CKE
/WE
CLK
A10
/CS
Resister
Mode
Set
3
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2 CK min
BA
4
Command
(any)
5
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Don ’t care
6
Notes :
1. BA : Bank address
IS43LR32160B, IS46LR32160B
7
8
9
Advanced Information
10
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