PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 62

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PPC460EX-SUB800N

Manufacturer Part Number
PPC460EX-SUB800N
Description
Manufacturer
AMCC
Datasheet
460EX – PPC460EX Embedded Processor
Multipurpose Signals
In addition to multiplexing, some pins such as those carrying the EOTx/TCx signals are also multipurpose. Control
of which function a multipurpose pin has is determined by direction, register settings, and so on. Both functions are
shown separated by a slash (/).
Multimode Signals
In some cases (for example, Ethernet) the function of a pin may vary with different modes of operation. When a pin
has multiple signal names assigned to distinguish different modes of operation, all of the names are shown
separated by a comma.
Strapping Pins
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs only
during reset and are used for other functions during normal operation (see “Strapping” on page 102). Note that
these are not multiplexed pins since the function of the pins is not programmable.
Reserved Pins
The balls marked Reserved on this chip are not functional. However, some of the reserved balls cannot be left
unconnected. Connect the balls shown in the following table as indicated:
Unused Interfaces
The following describes how to terminate the PCI, PCI Express, SATA, and GPIO signals that might not be used.
PCI:
When the PCI bridge is unused, configure the PCI controller to park on the bus by pulling the PCIReq0/GNT signal
low. Parking forces the PLB4 to PCI bridge to actively drive PCI0AD0:31 and PCI0C0:3/BE0:3 greatly reducing the
number of termination resistors required. The remaining PCI control signals must be terminated as follows:
PCI-E/SATA:
When the PCI Express 0/SATA interface is unused, terminate as follows:
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• Disable the internal PCI arbiter. (See the Bootstrap Operation chapter in the user’s manual. Boot Options A-F
• PCI0SErr - Pull up through a 3k Ω resistor to +3.3V
• PCI0TRDY - Pull up through a 3k Ω resistor to +3.3V
• PCI0Stop - Pull up through a 3k Ω resistor to +3.3V.
• PCI0Req0/Gnt - Pull down through a 1k Ω resistor to GND.
• PCI0Req1:3 - Individually pull up each signal through 3k Ω resistors to +3.3V.
• PCI0Clk - Requires a clock. The frequency must be between 1MHz and 66MHz.
• PCIE0AVReg[SATA0AVReg] - Leave unconnected.
• PCIE0CalRN[SATA0CalRN] - Leave unconnected.
• PCIE0CalRP[SATA0CalRP] - Leave unconnected.
• PCIE0RefClk[SATA0RefClk] - Pull down through a 1k Ω resistor to GND.
• PCIE0RefClk[SATA0RefClk] - Pull down through a 1k Ω resistor to GND.
• PCIE0Rx0[SATA0Rx0] - Pull down through a 1k Ω resistor to GND.
automatically disable the PCI Arbiter.)
Table 8. Non-Functional Ball Connections
AM15
AN15
Ball
Connection
1k Ω to GND
1k Ω to GND
Preliminary Data Sheet
Revision 1.19 – June 17, 2009
AMCC Proprietary

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