PPC460EX-SUB800N AMCC, PPC460EX-SUB800N Datasheet - Page 69
PPC460EX-SUB800N
Manufacturer Part Number
PPC460EX-SUB800N
Description
Manufacturer
AMCC
Datasheet
1.PPC460EX-SUB800N.pdf
(106 pages)
- Current page: 69 of 106
- Download datasheet (2Mb)
Revision 1.19 – June 17, 2009
Table 9. Signal Functional Description (Part 6 of 10)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3kΩ to OV
3. Must pull down (recommended value is 1kΩ to GND)
4. If not used, must pull up (recommended value is 3kΩ for LVTTL or 8.2kΩ for PCI to OV
5. If not used, must pull down (recommended value is 1kΩ)
6. Strapping input during reset; pull-up (recommended value is 3kΩ to OV
AMCC Proprietary
DMA Interface
DMAAck0:3
DMAReq0:3
EOT0:3/TC0:3
External Peripheral Interface
PerAddr05:31
PerData00:31
PerPar0:3
PerBLast
PerCS0:5
PerOE
PerReady
PerR/W
PerWBE0:3
PerErr
ExtReset
PerClk
Preliminary Data Sheet
GND) required
Signal Name
External peripheral DMA acknowledge.
Used by the PPC460EX to indicate that data transfers have
occurred.
External peripheral DMA request.
Used by slave peripherals to indicate they are prepared to
transfer data.
End Of Transfer/Terminal Count.
Peripheral address bus used by the PPC460EX.
PerAddr05 is the most significant bit (msb) on this bus.
Peripheral data bus used by the PPC460EX.
PerData00 is the most significant bit (msb) on this bus.
Peripheral data bus parity used by the PPC460EX.
Last burst transfer.
Used by either the peripheral controller or DMA controller to
indicates the last transfer of a memory access.
External peripheral device select.
Output enable.
Used by either peripheral controller or DMA controller depending
upon the type of transfer involved. When the PPC460EX is the
bus master, it enables the selected device to drive the bus.
Used by a peripheral slave to indicate it is ready to transfer data.
Read/Write.
Used by the PPC460EX as an output by either the peripheral
controller or DMA controller depending upon the type of transfer
involved. High indicates a read from memory, low indicates a
write to memory.
External peripheral data bus byte enables.
External Error. Used as an input to record external slave
peripheral errors.
Peripheral Reset. Used by synchronous peripheral slaves.
Note: The state of any external signals or clocks cannot be
guaranteed until the ExtReset signal has been de-asserted.
Peripheral Clock. Used by synchronous peripheral slaves.
DD
or 8.2kΩ for PCI to OV
Description
460EX – PPC460EX Embedded Processor
DD
DD
) or pull-down (recommended value is 1kΩ to
or equivalent.
DD
or equivalent.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
I
I
I
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
3.3V LVTTL
Type
Rcvr
Rcvr
Notes
1, 2
1, 5
5
5
69
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