ADSP-BF535PKB-350 Analog Devices Inc, ADSP-BF535PKB-350 Datasheet - Page 37

IC DSP CONTROLLER 16BIT 260 BGA

ADSP-BF535PKB-350

Manufacturer Part Number
ADSP-BF535PKB-350
Description
IC DSP CONTROLLER 16BIT 260 BGA
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr

Specifications of ADSP-BF535PKB-350

Rohs Status
RoHS non-compliant
Interface
PCI, SPI, SSP, UART, USB
Clock Rate
350MHz
Non-volatile Memory
External
On-chip Ram
308kB
Voltage - I/o
3.30V
Voltage - Core
1.60V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
260-BGA
Device Core Size
32b
Architecture
Modified Harvard
Format
Floating Point
Clock Freq (max)
350MHz
Device Input Clock Speed
350MHz
Program Memory Size
Not RequiredKB
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-BF535PKB-350
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
ADSP-BF535PKB-350 1.3
Manufacturer:
ADI
Quantity:
246
Table 27. PLL Power Dissipation
The frequency f includes driving the load high and then back low.
For example: DATA31–0 pins can drive high and low at a
maximum rate of 1/(2 t
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
Note that the conditions causing a worst-case P
those causing a worst-case P
while 100% of the output pins are switching from all ones (1s) to
all zeros (0s). Note, as well, that it is not common for an appli-
cation to have 100% or even 50% of the outputs switching
simultaneously.
Test Conditions
All timing parameters appearing in this data sheet were measured
under the conditions described in this section.
Output Enable Time
Output pins are considered to be enabled when they have made
a transition from a high impedance state to the point when they
start driving. The output enable time t
point when a reference signal reaches a high or low voltage level
to the point when the output starts driving as shown in the Output
Enable/Disable diagram
the interval from when the reference signal switches to when the
output voltage reaches 2.0 V (output high) or 1.0 V (output low).
Time t
when the output reaches the 1.0 V or 2.0 V trip voltage. Time
t
If multiple pins (such as the data bus) are enabled, the measure-
ment value is that of the first pin to start driving.
Output Disable Time
Output pins are considered to be disabled when they stop driving,
go into a high impedance state, and start to decay from their
output high or low voltage. The time for the voltage on the bus
to decay by V is dependent on the capacitive load, C
load current, I
equation:
REV. A
Parameter Test Conditions
I
ENA
DDPLL
is calculated as shown in the equation:
TRIP
is the interval from when the output starts driving to
P
L
V
TOTAL
. This decay time can be approximated by the
DDPLL
t
ENA
t
DECAY
=1.5 V, 25ºC
=
=
(Figure
t
SCLK
P
ENA_MEASURED
=
EXT
INT
) while in SDRAM burst mode.
C
. Maximum P
+
L
22). The time t
I
V
DD
ENA
I
V
L
is the interval from the
DDINT
t
TRIP
INT
Typical
4.0
cannot occur
EXT
ENA_MEASURED
differ from
L
and the
Unit
mA
is
–37–
The output disable time t
t
t
switches to when the output voltage decays V from the measured
output high or output low voltage. The time t
with test loads C
Example System Hold Time Calculation
To determine the data output hold time in a particular system,
first calculate t
to be the difference between the ADSP-BF535 Blackfin proces-
sor’s output voltage and the input threshold for the device
requiring the hold time. A typical V will be 0.4 V. C
bus capacitance (per data line), and I
state current (per data line). The hold time will be t
minimum disable time (for example, t
cycle).
DIS_MEASURED
DIS_MEASURED
(MEASURED)
(MEASURED)
Figure 24. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
t
OUTPUT
Figure 23. Equivalent Device Loading for AC
Measurements (Includes All Fixtures)
DIS
V
V
OUTPUT
PIN
TO
INPUT
OH
OL
OR
OUTPUT STOPS DRIVING
and t
is the interval from when the reference signal
Figure 22. Output Enable/Disable
DECAY
1.5V
L
DECAY
and I
using the equation given above. Choose V
REFERENCE
t
V
V
DIS_MEASURED
OH
OL
SIGNAL
as shown in
L
t
, and with V equal to 0.5 V.
(MEASURED)
DECAY
VOLTAGE TO BE APPROXIMATELY 1.5V.
(MEASURED) + V
DIS
TEST CONDITIONS CAUSE THIS
is the difference between
30pF
HIGH IMPEDANCE STATE.
t
ENA
Figure
L
ADSP-BF535
is the total leakage or three-
DSDAT
V
50
OUTPUT STARTS DRIVING
for an SDRAM write
22. The time
DECAY
t
2.0V
1.0V
ENA-MEASURED
DECAY
t
TRIP
is calculated
(MEASURED)
(MEASURED)
L
is the total
1.5V
1.5V
V
V
plus the
OL
OH

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