EPF6024AQC208-3N Altera, EPF6024AQC208-3N Datasheet - Page 14

• Manufacturer Part Number: EPF6024AQC208-3N
• Description: IC FLEX 6000 FPGA 24K 208-PQFP
• Manufacturer: Altera
• Series: FLEX 6000r

Specifications of EPF6024AQC208-3N

• Number Of Logic Elements/cells: 1960
• Number Of Labs/clbs: 196
• Number Of I /o: 171
• Number Of Gates: 24000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Family Name: FLEX 6000
• Number Of Usable Gates: 24000
• Number Of Logic Blocks/elements: 1960
• # I/os (max): 171
• Frequency (max): 142.86MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 3.3V
• Logic Cells: 1960
• Device System Gates: 24000
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Total Ram Bits: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1957; EPF6024AQC208-3N

FLEX 6000 Programmable Logic Device Family Data Sheet
Figure 7. LE Operating Modes
Notes:
(1)
(2)
(3)
14
The register feedback multiplexer is available on LE 2 of each LAB.
The data1 and data2 input signals can supply a clock enable, up or down control, or register feedback signals for
all LEs other than the second LE in an LAB.
The LAB-wide synchronous clear and LAB-wide synchronous load affect all registers in an LAB.
Counter Mode
Arithmetic Mode
data1
data2
Normal Mode
data1
data2
data3 (data)
data1
data2
data3
data4
(1)
(2)
(2)
Carry-In
Carry-In
Carry-In
3-Input
3-Input
LUT
LUT
3-Input
3-Input
LUT
LUT
4-Input
LUT
Carry-Out
Carry-Out
Cascade-In
Cascade-In
Cascade-In
Cascade-Out
LAB-Wide
Synchronous
Load
Cascade-Out
Cascade-Out
(3)
LAB-Wide Synchronous
Clear
D
CLRN
PRN
(3)
Q
D
CLRN
PRN
D
CLRN
PRN
Q
Q
LE-Out
Altera Corporation
LE-Out
LE-Out