EP2SGX30CF780C4N Altera, EP2SGX30CF780C4N Datasheet - Page 43
EP2SGX30CF780C4N
Manufacturer Part Number
EP2SGX30CF780C4N
Description
IC STRATIX II GX 30K 780-FBGA
Manufacturer
Altera
Series
Stratix® II GXr
Datasheet
1.EP2SGX30DF780C5.pdf
(316 pages)
Specifications of EP2SGX30CF780C4N
Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
361
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1927
EP2SGX30CF780C4N
EP2SGX30CF780C4N
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Altera Corporation
October 2007
Transceiver Clocking
Each Stratix II GX device transceiver block contains two transmitter PLLs
and four receiver PLLs. These PLLs can be driven by either of the two
reference clocks per transceiver block. These REFCLK signals can drive all
global clocks, transmitter PLL inputs, and all receiver PLL inputs.
Subsequently, the transmitter PLL output can only drive global clock
lines and the receiver PLL reference clock port. Only one of the two
reference clocks in a quad can drive the Inter Quad (I/Q) lines to clock the
PLLs in the other quads.
Figure 2–29
global clock connections for the EP2SGX130 device.
shows the inter-transceiver line connections as well as the
Stratix II GX Device Handbook, Volume 1
Stratix II GX Architecture
2–35
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